CS8900A-CQ3Z Cirrus Logic Inc, CS8900A-CQ3Z Datasheet - Page 137

• Manufacturer Part Number: CS8900A-CQ3Z
• Description: IC LAN ETHERNET CTLR 3V 100LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Single Chipr

Specifications of CS8900A-CQ3Z

• Package / Case: 100-LQFP
• Controller Type: Ethernet Controller (IEEE 802.3)
• Interface: ISA-BUS
• Voltage - Supply: 3V, 5V
• Current - Supply: 95mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Ethernet Connection Type: 10BASE- 2 or 10BASE- 5 or 10BASE- F or 10BASE- T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps
• Supply Voltage (max): 6 V
• Supply Voltage (min): - 0.3 V
• Supply Current (max): +/- 10 mA
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1163 - KIT EVAL FOR CS8900A
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1127

DS271F5
10.3 Acronyms Specific to the CS8900A
10.4 Definitions Specific to the CS8900A
Act-Once bit
Committed Receive Frame
Committed Transmit Frame
Event or Interrupt Event
StreamTransfer
PacketPage
CS8900A
Crystal LAN™ Ethernet Controller
BufCFG
BufEvent
BusCTL
BusST
ENDEC
ISQ
LineCTL
LineST
RxCFG
RxCTL
RxEvent
SelfCTL
SelfST
TestCTL
TxCFG
TxCMD
TxEvent
A control bit that causes the CS8900A to take a certain action once when a logic "1" is
written to that bit. To cause the action again, the host must rewrite a "1".
A receive frame is said to be "committed" after the frame has been buffered by the
CS8900A, and the host has been notified, but the frame has not yet been transferred
by the host.
A transmit frame is said to be "committed" after the host has issued a Transmit
Command, and the CS8900A has reserved buffer space and notified the host that it is
ready for transmit.
The term "Event" is used in this document to refer to something that can trigger an
interrupt. Items that are considered "Events" are reported in the three Event registers
(RxEvent, TxEvent, or BufEvent) and in two counter-overflow bits (RxMISS and
TxCOL).
A method used to significantly reduce the number of interrupts to the host processor
during block data transfers (Patent Pending).
A unified, highly-efficient method of controlling and getting status of a peripheral
controller in I/O or Memory space.
CIRRUS LOGIC PRODUCT DATASHEET
Buffer Configuration - Register B
Bus Control - Register 17
Bus State - Register 18
Manchester encoder/decoder
Interrupt Status Queue - register 0
Ethernet Line Control - Register 13
Ethernet Line Status - Register 14
Receive Configuration - Register 3
Receive Control - Register 5
Receive Event - Register 4
Self Control - Register 15
Self Status - Register 16
Test Control - Register 19
Transmit Configuration - Register 7
Transmit Command
Transmit Event - Register 8
Buffer Event - Register C
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