CS8900A-CQ3Z Cirrus Logic Inc, CS8900A-CQ3Z Datasheet - Page 97

• Manufacturer Part Number: CS8900A-CQ3Z
• Description: IC LAN ETHERNET CTLR 3V 100LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Single Chipr

Specifications of CS8900A-CQ3Z

• Package / Case: 100-LQFP
• Controller Type: Ethernet Controller (IEEE 802.3)
• Interface: ISA-BUS
• Voltage - Supply: 3V, 5V
• Current - Supply: 95mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Ethernet Connection Type: 10BASE- 2 or 10BASE- 5 or 10BASE- F or 10BASE- T
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Standard Supported: IEEE 802.3
• Data Rate: 10 Mbps
• Supply Voltage (max): 6 V
• Supply Voltage (min): - 0.3 V
• Supply Current (max): +/- 10 mA
• Maximum Operating Temperature: + 70 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1163 - KIT EVAL FOR CS8900A
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1127

DS271F5
CS8900A
Crystal LAN™ Ethernet Controller
Entering this example, the receive buffer is empty and the
DMA Frame Count (PacketPage base + 0028h) is zero.
Frame 1 received and completely stored in on-chip RAM.
Frame 2 received and completely stored in on-chip RAM.
At this point, the CS8900A does not have sufficient buffer
space for another complete large frame (1518 bytes).
Frame 3 starts to be received and passes the DA filter.
This activates Auto-Switch DMA.
Frame 1 is placed in host memory via DMA freeing
space for the incoming Frame 3. The CS8900A updates
the DMA Frame Count, DMA Start of Frame and DMA
Byte Count registers. It then sets the RxDMA DMAFrame
bit and generates an interrupt.
Frame 2 is placed in host memory via DMA and the
CS8900A updates the DMA registers.
The host responds to the RxDMAFrame interrupt, and
reads the Frame Count register, which is cleared when
read. Since there are no receive interrupts pending, the
CS8900A exits DMA (assumes Frame 3 is still coming in).
Frame 3 is completely buffered in on-chip RAM, and
awaits processing by the host.
Figure 27. Example of Auto-Switch DMA
CIRRUS LOGIC PRODUCT DATASHEET
Enter Example Here
Exit Example
Time
Receive DMA used
during this time.
97