SC18IS601IBS,151 NXP Semiconductors, SC18IS601IBS,151 Datasheet - Page 8

IC SPI TO I2C BUS 24-HVQFN

SC18IS601IBS,151

Manufacturer Part Number
SC18IS601IBS,151
Description
IC SPI TO I2C BUS 24-HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC18IS601IBS,151

Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Controller Type
I²C Bus Controller
Interface
SPI
Voltage - Supply
2.4 V ~ 3.6 V
Current - Supply
11mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Frequency
12 MHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.4 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-3511 - DEMO BOARD SPI TO I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4710
935286979151
SC18IS601IBS-S
NXP Semiconductors
SC18IS600_601_5
Product data sheet
6.2.1.2 Open-drain output configuration
6.2.1.3 Input-only configuration
6.2.1.4 Push-pull output configuration
The open-drain output configuration turns off all pull-ups and only drives the pull-down
transistor of the pin when the pin latch contains a logic 0. To be used as a logic output, a
pin configured in this manner must have an external pull-up, typically a resistor tied to
V
The open-drain pin configuration is shown in
An open-drain pin has a Schmitt-triggered input that also has a glitch suppression circuit.
The input-only pin configuration is shown in
also has a glitch suppression circuit.
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the pin latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a pin output.
The push-pull pin configuration is shown in
A push-pull pin has a Schmitt-triggered input that also has a glitch suppression circuit.
Fig 7.
Fig 8.
DD
. The pull-down for this mode is the same as for the quasi-bidirectional mode.
Open-drain output configuration
Input-only configuration
pin latch data
Rev. 05 — 28 July 2008
input data
input data
V
SS
Figure
Figure
glitch rejection
Figure
9.
8. It is a Schmitt-triggered input that
7.
glitch rejection
002aab884
GPIO pin
SC18IS600/601
SPI to I
002aab883
GPIO pin
© NXP B.V. 2008. All rights reserved.
2
C-bus interface
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