TDA8026ET/C2,557 NXP Semiconductors, TDA8026ET/C2,557 Datasheet - Page 35
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
TDA8026ET/C2,557
Manufacturer Part Number
TDA8026ET/C2,557
Description
IC SMART CARD SLOT 64TFBGA
Manufacturer
NXP Semiconductors
Datasheet
1.TDA8026ETC2518.pdf
(59 pages)
Specifications of TDA8026ET/C2,557
Controller Type
Smart Card Interface
Interface
I²C
Voltage - Supply
2.7 V ~ 5.5 V
Current - Supply
210mA
Operating Temperature
-25°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TDA8026ET/C2,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
TDA8026_1
Product data sheet
8.9 Answer to reset counters
In
converter is still active.
Each TDA8026 card slot has its own sequencer. The sequencer controls the activation
and deactivation sequences. In addition to these sequencers, there are two Answer To
Reset (ATR) counters:
The operating mode (asynchronous or synchronous) has to be selected by the
microcontroller. The ATR counters are used in asynchronous mode to manage the RST
pin and to check the card’s ATR. In synchronous mode, the RST pin is controlled by the
microcontroller using the RSTIN bit (see the bit description in
Table 22 on page
The ATR counter module comprises two counters:
Fig 11. Deactivation sequence
•
•
•
•
Figure 11
ATR dedicated to card slot 1
ATR dedicated to the other slots
EARLY answer counter: The early answer counter consists of a fixed part which
counts up to 200 clock cycles. The secondary part counts up to the D[7:0] bits value of
clock cycles (see the register descriptions in
page
370 clock cycles
MUTE counter: The mute counter counts up to C[15:8] and C[7:0] bits value for the
clock cycles (see the register descriptions in
page
42100 clock cycles.
Both counters can be easily quickly reprogrammed, if for example, a card does not
fully meet the EMVCo/ISO7816 standards or to enable the implementation of new and
enhanced standards.
internal DC-to-DC
converter enable
internal clock
27). The default D[7:0] bits value is 170 which gives a total default count of
28). The default value of the C[15:0] bits is 42100 which gives a default count of
oscillator
START
RST
CLK
V
only one card slot is active. If another card slot is active, the DC-to-DC
I/O
CC(n)
(n)
(n)
(n)
All information provided in this document is subject to legal disclaimers.
24) and the card’s ATR is not checked.
Rev. 1 — 9 March 2010
high frequency
t
11
0
t
12
1
t
Table 16 on page 23
Table 22 on page 24
2
13
Multiple smart card slot interface IC
t
14
3
4
5
6
Table 11 on page 19
t
15
7
low frequency
and
and
TDA8026
© NXP B.V. 2010. All rights reserved.
Table 27 on
Table 30 on
001aal091
T/2
and
35 of 59
(n)