ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 121

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ISP1362EE

Manufacturer Part Number
ISP1362EE
Description
IC USB CTRL SNGL CHIP 64TFBGA
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1362EE

Controller Type
USB 2.0 Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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NXP Semiconductors
Table 132. DcLock register: bit allocation
Table 134. DcScratch Information register: bit allocation
ISP1362_5
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
15.3.2 Unlock Device (B0h)
15.3.3 DcScratch register (R/W: B3h/B2h)
R/W
15
15
W
W
1
7
0
7
0
-
-
This command unlocks the Peripheral Controller from write-protection mode after a
‘resume’. In the ‘suspend’ state, all registers and buffer memory are write-protected to
prevent data corruption by external devices during a ‘resume’. Also, the register access to
read is possible only after the ‘unlock device’ command is executed.
After waking up from the ‘suspend’ state, firmware must unlock registers and buffer
memory by using this command, by writing the unlock code (AA37h) into the DcLock
register (8-bit bus: lower byte first). The bit allocation of the DcLock register is given in
Table
Code (Hex): B0 — unlock the device
Transaction — write 2 bytes (unlock code) (code or data)
Table 133. DcLock register: bit description
This command accesses the 16-bit DcScratch register, which can be used by firmware to
save and restore information. For example, the device status before powering down in the
‘suspend’ state.
The register bit allocation is given in
Code (Hex): B2/B3 — write or read DcScratch register
Transaction — write or read 2 bytes (code or data)
Bit
15 to 0
reserved
132.
R/W
14
14
W
W
0
6
0
6
0
-
-
Symbol
UNLOCK[15:0]
R/W
13
13
W
W
1
5
1
5
0
-
-
Rev. 05 — 8 May 2007
Description
Sending data AA37h unlocks internal registers and buffer memory to
write, following a resume.
UNLOCK[15:8] = AAh
UNLOCK[7:0] = 37h
R/W
R/W
12
12
W
W
0
4
1
0
4
0
SFIR[7:0]
Table
134.
R/W
R/W
11
11
W
W
1
3
0
0
3
0
SFIR[12:8]
Single-chip USB OTG Controller
R/W
R/W
10
10
W
W
0
2
1
0
2
0
R/W
R/W
W
W
9
1
1
1
9
0
1
0
© NXP B.V. 2007. All rights reserved.
ISP1362
120 of 152
R/W
R/W
W
W
8
0
0
1
8
0
0
0

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