ISP1362EE ST-Ericsson Inc, ISP1362EE Datasheet - Page 17

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ISP1362EE

Manufacturer Part Number
ISP1362EE
Description
IC USB CTRL SNGL CHIP 64TFBGA
Manufacturer
ST-Ericsson Inc
Datasheet

Specifications of ISP1362EE

Controller Type
USB 2.0 Controller
Interface
Parallel/Serial
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-TFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-

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NXP Semiconductors
ISP1362_5
Product data sheet
Figure 5
block size of 64 bytes. The HCD may put a PTD with payload size of up to 64 bytes but not
more. Depending on the ATL or INTL buffer size, up to 32 ATL blocks and 32 INTL blocks
can be allocated. Note that a portion of the ATL or INTL buffer remains unused. This is
allowed but can be avoided by choosing the appropriate ATL or INTL buffer size and block
size.
The ISTL0 or ISTL1 buffer memory (for isochronous transfer) uses a different memory
management scheme (see
memory. While the PTD header remains 8 bytes for all PTDs, the PTD payload can be of
any size. The PTD payload, however, is padded to the next double word boundary when
the Host Controller calculates the location of the next PTD header. The ISP1362 Host
Controller checks the payload size from the ‘Total size’ field of the PTD itself and
calculates the location of the next PTD header based on this information.
Fig 5. A sample snapshot of the ATL or INTL memory management scheme
provides a snapshot of a sample ATL or INTL buffer area of 256 bytes with a
ATL or INTL buffer area
Starting address of the
Rev. 05 — 8 May 2007
Figure
64 bytes PTD header
8 bytes PTD header
64 bytes PTD header
8 bytes PTD header
8 bytes PTD header
64 bytes PTD header
6). There is no fixed block size for the ISTL buffer
Payload area
Payload area
Payload are
004aaa055
Block of 72 bytes
(64 + 8,
72 bytes
72 bytes
where 64 is the block size defined)
Single-chip USB OTG Controller
© NXP B.V. 2007. All rights reserved.
ISP1362
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