DS21Q42T+ Maxim Integrated Products, DS21Q42T+ Datasheet - Page 56
![IC FRAMER ENHANCED T1 4X 128TQFP](/photos/6/82/68247/128-lqfp_21-0086d_sml.jpg)
DS21Q42T+
Manufacturer Part Number
DS21Q42T+
Description
IC FRAMER ENHANCED T1 4X 128TQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21Q42T.pdf
(116 pages)
Specifications of DS21Q42T+
Controller Type
T1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 56 of 116
- Download datasheet (950Kb)
RMR1/RMR2/RMR3: RECEIVE MARK REGISTERS
(Address=2D to 2F Hex)
11.2.2 Per-Channel Code Insertion
The second method involves using the Receive Channel Control Registers (RCC1/2/3) to determine
which of the 24 T1 channels off of the T1 line and going to the backplane should be overwritten with the
code placed in the Receive Channel Registers (RC1 to RC24). This method is more flexible than the first
in that it allows a different 8–bit code to be placed into each of the 24 T1 channels.
RC1 TO RC24: RECEIVE CHANNEL REGISTERS
(Address=58 to 5F and 80 to 8F Hex)
(for brevity, only channel one is shown; see Table 4-1 for other register address)
(MSB)
C7
RCC1/RCC2/RCC3: RECEIVE CHANNEL CONTROL REGISTER
(Address=1B to 1D Hex)
(MSB)
(MSB)
CH16
CH24
CH16
CH24
CH8
CH8
SYMBOLS
SYMBOL
SYMBOL
CH1 – 24
CH1 – 24
C7
C0
C6
CH15
CH23
CH7
CH15
CH23
CH7
C5
CH14
CH22
CH6
RMR1.0 - 3.7
POSITIONS
RCC1.0 - 3.7
CH14
CH22
POSITION
POSITION
CH6
RC1.7
RC1.0
C4
CH13
CH21
CH5
CH13
CH21
CH5
NAME AND DESCRIPTION
Receive Channel Mark Control Bits
0 =do not affect the receive data associated with this channel
1 = replace the receive data associated with this channel with
either the idle code or the digital milliwatt code (depends on
the RCR2.7 bit)
NAME AND DESCRIPTION
MSB of the Code (this bit is sent first to the backplane)
LSB of the Code (this bit is sent last to the backplane)
NAME AND DESCRIPTION
Receive Code Insertion Control Bits
0 = do not insert data from the RC register into the receive data
stream
1 = insert data from the RC register into the receive data
stream
C3
CH12
CH20
CH4
CH12
CH20
CH4
56 of 116
C2
CH11
CH19
CH3
CH11
CH19
CH3
C1
CH10
CH18
CH2
CH10
CH18
CH2
(LSB)
C0
(LSB)
CH17
CH1
CH9
(LSB)
CH17
CH1
CH9
RC1 (80)
RCC1 (1B)
RCC2 (1C)
RCC3 (1D)
RMR1 (2D)
RMR2 (2E)
RMR3 (2F)
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