DP8390DV National Semiconductor, DP8390DV Datasheet - Page 23

• Manufacturer Part Number: DP8390DV
• Description: IC CTRLR NETWORK IN (NIC)68PLCC
• Manufacturer: National Semiconductor

Specifications of DP8390DV

• Controller Type: Network Interface Controller (NIC)
• Voltage - Supply: 5V
• Current - Supply: 40mA
• Mounting Type: Surface Mount
• Package / Case: 68-LCC (J-Lead)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Operating Temperature: -
• Interface: -
• Other names: *DP8390DV

10 0 Internal Registers
10 3 Register Descriptions (Continued)
TRANSMIT CONFIGURATION REGISTER (TCR)
The transmit configuration establishes the actions of the transmitter section of the NIC during transmission of a packet on the
network LB1 and LB0 which select loopback mode power up as 0
D1 D2
Bit
D0
D3
D4
D5
D6
D7
LB0 LB1
reserved
reserved
reserved
Symbol
OFST
CRC
ATD
INHIBIT CRC
0 CRC appended by transmitter
1 CRC inhibited by transmitter
ENCODED LOOPBACK CONTROL These encoded configuration bits set the type of loopback
that is to be performed Note that loopback in mode 2 sets the LPBK pin high this places the SNI
in loopback mode and that D3 of the DCR must be set to zero for loopback operation
AUTO TRANSMIT DISABLE This bit allows another station to disable the NIC’s transmitter by
transmission of a particular multicast packet The transmitter can be re-enabled by resetting this
bit or by reception of a second particular multicast packet
0 Normal Operation
1 Reception of multicast address hashing to bit 62 disables transmitter reception of multicast
address hashing to bit 63 enables transmitter
COLLISION OFFSET ENABLE This bit modifies the backoff algorithm to allow prioritization of
nodes
0 Backoff Logic implements normal algorithm
1 Forces Backoff algorithm modification to 0 to 2
then follows standard backoff (For first three collisions station has higher average backoff delay
making a low priority mode )
reserved
reserved
reserved
Mode 0
Mode 1
Mode 2
Mode 3
In loopback mode CRC can be enabled or disabled to test the CRC logic
7
(Continued)
6
LB1
0
0
1
1
5
0DH (WRITE)
OFST
LB0
4
0
1
0
1
23
ATD
3
Normal Operation (LPBK
Internal Loopback (LPBK
External Loopback (LPBK
External Loopback (LPBK
Description
LB1
2
min(3
LB0
1
a
n 10)
CRC
0
slot times for first three collisions
e
e
e
e
0)
0)
1)
0)