PIC24FJ32GA002-I/SP Microchip Technology Inc., PIC24FJ32GA002-I/SP Datasheet - Page 155

• Manufacturer Part Number: PIC24FJ32GA002-I/SP
• Description: MCU, 16-Bit, 28-Pin, 32KB Flash, 8KB RAM, 21 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ32GA002-I/SP

• A/d Inputs: 10 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Memory Capacity: 32 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 21
• Number Of Pins: 28
• Package Type: 28-pin SPDIP
• Programmable Memory: 32K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

16.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules
available in the PIC24F device family. The UART is a
full-duplex asynchronous system that can communi-
cate with peripheral devices, such as personal comput-
ers, LIN, RS-232 and RS-485 interfaces. The module
also supports a hardware flow control option with the
UxCTS and UxRTS pins and also includes an IrDA
encoder and decoder.
The primary features of the UART module are:
• Full-Duplex, 8 or 9-Bit Data Transmission through
• Even, Odd or No Parity Options (for 8-bit data)
FIGURE 16-1:
© 2007 Microchip Technology Inc.
the UxTX and UxRX Pins
Note 1: This data sheet summarizes the features
Note:
2: This peripheral contains input and output
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
associated “PIC24F Family Reference
Manual” chapter.
functions that may need to be configured
by the peripheral pin select feature. For
more
“Peripheral Pin Select”.
This peripheral’s inputs and outputs must be assigned to an available RPn pin before use. Please
see Section 9.4 “Peripheral Pin Select” for more information.
information,
UART SIMPLIFIED BLOCK DIAGRAM
Hardware Flow Control
Baud Rate Generator
UARTx Transmitter
UARTx Receiver
see
IrDA
Section 9.4
®
PIC24FJ64GA004 FAMILY
Preliminary
®
• One or Two Stop bits
• Hardware Flow Control Option with UxCTS and
• Fully Integrated Baud Rate Generator with 16-Bit
• Baud Rates Ranging from 1 Mbps to 15 bps at
• 4-Deep, First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive Interrupts
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA Encoder and Decoder Logic
• 16x Baud Clock Output for IrDA Support
A simplified block diagram of the UART is shown in
Figure 16-1. The UART module consists of these key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
UxRTS Pins
Prescaler
16 MIPS
Buffer
(9th bit = 1)
BCLKx
UxRTS
UxCTS
UxRX
UxTX
DS39881B-page 153