PIC24FJ32GA002-I/SP Microchip Technology Inc., PIC24FJ32GA002-I/SP Datasheet - Page 189

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PIC24FJ32GA002-I/SP

Manufacturer Part Number
PIC24FJ32GA002-I/SP
Description
MCU, 16-Bit, 28-Pin, 32KB Flash, 8KB RAM, 21 I/O, Nanowatt
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24FJ32GA002-I/SP

A/d Inputs
10 Channel, 10-Bit
Comparators
2
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Memory Capacity
32 Kbytes
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
21
Number Of Pins
28
Package Type
28-pin SPDIP
Programmable Memory
32K Bytes
Ram Size
8K Bytes
Speed
32 MHz
Timers
5-16-bit
Voltage, Range
2-3.6 V
Voltage, Rating
2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24FJ32GA002-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
REGISTER 20-1:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-10
bit 9-8
bit 7-5
bit 4-3
bit 2
bit 1
bit 0
SSRC2
R/W-0
ADON
R/W-0
ADON: A/D Operating Mode bit
1 = A/D Converter module is operating
0 = A/D Converter is off
Unimplemented: Read as ‘0’
ADSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
FORM1:FORM0: Data Output Format bits
11 = Signed fractional (sddd dddd dd00 0000)
10 = Fractional (dddd dddd dd00 0000)
01 = Signed integer (ssss sssd dddd dddd)
00 = Integer (0000 00dd dddd dddd)
SSRC2:SSRC0: Conversion Trigger Source Select bits
111 = Internal counter ends sampling and starts conversion (auto-convert)
110 = Reserved
10x = Reserved
011 = Reserved
010 = Timer3 compare ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing SAMP bit ends sampling and starts conversion
Unimplemented: Read as ‘0’
ASAM: A/D Sample Auto-Start bit
1 = Sampling begins immediately after last conversion completes. SAMP bit is auto-set.
0 = Sampling begins when SAMP bit is set
SAMP: A/D Sample Enable bit
1 = A/D sample/hold amplifier is sampling input
0 = A/D sample/hold amplifier is holding
DONE: A/D Conversion Status bit
1 = A/D conversion is done
0 = A/D conversion is NOT done
SSRC1
R/W-0
U-0
AD1CON1: A/D CONTROL REGISTER 1
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
ADSIDL
SSRC0
R/W-0
R/C-0
PIC24FJ64GA004 FAMILY
U-0
U-0
Preliminary
HCS = Hardware Cleared, Set bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/W-0
ASAM
U-0
x = Bit is unknown
R/W-0 HCS
FORM1
R/W-0
SAMP
DS39881B-page 187
R/W-0 HCS
FORM0
DONE
R/W-0
bit 8
bit 0

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