PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 149
PIC16F690-E/P
Manufacturer Part Number
PIC16F690-E/P
Description
20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F690-EP.pdf
(294 pages)
Specifications of PIC16F690-E/P
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
7 MIPS
Eeprom Memory
256 Bytes
Input Output
18
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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11.4.7.1
The STRSYNC bit of the PSTRCON register gives the
user two selections of when the steering event will
happen. When the STRSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRCON register. In this case, the
output signal at the P1<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
FIGURE 11-19:
FIGURE 11-20:
© 2006 Microchip Technology Inc.
P1<D:A>
P1<D:A>
STRn
PWM
STRn
PWM
Steering Synchronization
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRSYNC = 1)
PWM Period
PORT Data
PIC16F631/677/685/687/689/690
Preliminary
P1n = PWM
Figures 11-19 and 11-20 illustrate the timing diagrams
of the PWM steering depending on the STRSYNC
setting.
P1n = PWM
PORT Data
PORT Data
DS41262C-page 147
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