PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 210

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PIC16F690-E/P

Manufacturer Part Number
PIC16F690-E/P
Description
20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F690-E/P

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
7 MIPS
Eeprom Memory
256 Bytes
Input Output
18
Interface
USART
Memory Type
Flash
Number Of Bits
8
Package Type
20-pin PDIP
Programmable Memory
7K Bytes
Ram Size
256 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC16F631/677/685/687/689/690
14.5
The WDT has the following features:
• Operates from the LFINTOSC (31 kHz)
• Contains a 16-bit prescaler
• Shares an 8-bit prescaler with Timer0
• Time-out period is from 1 ms to 268 seconds
• Configuration bit and software controlled
WDT is cleared under certain conditions described in
Table 14-7.
14.5.1
The WDT derives its time base from the 31 kHz
LFINTOSC. The LTS bit of the OSCCON register does
not reflect that the LFINTOSC is enabled.
The value of WDTCON is ‘---0 1000’ on all Resets.
This gives a nominal time base of 17 ms.
FIGURE 14-9:
TABLE 14-7:
DS41262C-page 208
WDTE = 0
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
LFINTOSC Clock
Note:
Note 1:
31 kHz
Watchdog Timer (WDT)
WDT OSCILLATOR
When the Oscillator Start-up Timer (OST)
is invoked, the WDT is held in Reset,
because the WDT Ripple Counter is used
by the OST to perform the oscillator delay
count. When the OST count has expired,
the WDT will begin counting (if enabled).
This is the shared Timer0/WDT prescaler. See Section 5.4 “Prescaler” for more information.
WDT STATUS
WATCHDOG TIMER BLOCK DIAGRAM
WDTE from the Configuration Word Register
SWDTEN from WDTCON
Conditions
16-bit WDT Prescaler
WDTPS<3:0>
From TMR0 Clock Source
Preliminary
14.5.2
The WDTE bit is located in the Configuration Word
register. When set, the WDT runs continuously.
When the WDTE bit in the Configuration Word register
is set, the SWDTEN bit of the WDTCON register has no
effect. If WDTE is clear, then the SWDTEN bit can be
used to enable and disable the WDT. Setting the bit will
enable it and clearing the bit will disable it.
The PSA and PS<2:0> bits of the OPTION register
have the same function as in previous versions of the
PIC16F631/677/685/687/689/690 Family of microcon-
trollers. See Section 5.0 “Timer0 Module” for more
information.
0
1
WDT CONTROL
PSA
Cleared until the end of OST
WDT Time-out
© 2006 Microchip Technology Inc.
0
Prescaler
Cleared
1
WDT
8
(1)
PSA
PS<2:0>
To TMR0

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