DS80C320-MCG+ Dallas Semiconductor, DS80C320-MCG+ Datasheet - Page 22

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DS80C320-MCG+

Manufacturer Part Number
DS80C320-MCG+
Description
Microcontroller, 8051 Comp., 4 8-Bit I/O Ports, 64K ROM/RAM, 25 MHz, 5 V, PDIP40
Manufacturer
Dallas Semiconductor
Datasheet

Specifications of DS80C320-MCG+

Eeprom Memory
0 Bytes
Input Output
32
Interface
UART
Memory Type
ROMless
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
0 Bytes
Ram Size
256 Bytes
Speed
25 MHz
Timers
3-16-bit
Voltage, Range
4.25-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
NOTES FOR DS80C320 DC ELECTRICAL CHARACTERISTICS
All parameters apply to both commercial and industrial temperature operation unless otherwise noted. Specifications to -40°C
are guaranteed by design and are not production tested.
1. All voltages are referenced to ground.
2. Active current is measured with a 25MHz clock source driving XTAL1, V
3. Idle mode current is measured with a 25MHz clock source driving XTAL1, V
4.
5. When addressing external memory. This specification only applies to the first clock cycle following transition.
6. RST = V
7. During a 0-to-1 transition, a one-shot drives the ports hard for two clock cycles. This measurement reflects port
8. Ports 1 and 3 source transition current when being pulled down externally. It reaches its maximum at
9. 0.45<V
10. Over the industrial temperature range, this specification has a maximum value of 200mA.
11. This is the current required from an external circuit to hold a logic low level on an I/O pin while the
12.
TYPICAL I
disconnected.
other pins disconnected.
Stop mode current measured with XTAL1 and RST grounded, V
in transition mode.
approximately 2V.
dedicated as an address bus on the DS80C320. Peak current occurs near the input transition point of the latch,
approximately 2V.
corresponding port latch bit is set to 1. This is only the current required to hold the low level; transitions from 1
to 0 on an I/O pin will also have to overcome the transition current.
Device operating range is 4.5V to 5.5V; however, device is tested to 4.0V to ensure proper operation at
minimum V
IN
CC
CC
<V
. This condition mimics operation of pins in I/O mode.
RST
vs. FREQUENCY
CC
. Not a high-impedance input. This port is a weak address holding latch because Port 0 is
.
22 of 40
CC
= 5.5V, all other pins disconnected.
CC
CC
= RST = 5.5V, all other pins
= 5.5V, RST at ground, all

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