PIC12F683-E/P Microchip Technology Inc., PIC12F683-E/P Datasheet - Page 72

• Manufacturer Part Number: PIC12F683-E/P
• Description: 8 PIN, 3.5 KB FLASH, 128 RAM, 6 I/O, PDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12F683-E/P

• A/d Inputs: 4 Channel, 10-Bit
• Comparators: 1
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Frequency: 20 MHz
• Input Output: 6
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 8-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Serial Interface: None
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F683
11.1
In Capture mode, CCPR1H:CCPR1L captures the
16-bit value of the TMR1 register when an event occurs
on pin GP2/AN2/T0CKI/INT/COUT/CCP1. An event is
defined as one of the following and is configured by
CCP1CON<3:0>:
• Every falling edge
• Every rising edge
• Every 4th rising edge
• Every 16th rising edge
When a capture is made, the interrupt request flag bit,
CCP1IF (PIR1<5>), is set. The interrupt flag must be
cleared in software. If another capture occurs before
the value in register CCPR1 is read, the old captured
value is overwritten by the new captured value.
11.1.1
In Capture mode, the GP2/AN2/T0CKI/INT/COUT/
CCP1 pin should be configured as an input by setting
the TRISIO<2> bit.
FIGURE 11-1:
DS41211B-page 70
GP2/CCP1
pin
Note:
Capture Mode
Edge Detect
Q’s
CCP1 PIN CONFIGURATION
If the GP2/AN2/T0CKI/INT/COUT/CCP1
pin is configured as an output, a write to
the port can cause a capture condition.
Prescaler
1, 4, 16
and
CCP1CON<3:0>
Set Flag bit CCP1IF
CAPTURE MODE
OPERATION BLOCK
DIAGRAM
(PIR1<5>)
Capture
Enable
CCPR1H
TMR1H
CCPR1L
TMR1L
Preliminary
11.1.2
Timer1 must be running in Timer mode or Synchro-
nized Counter mode for the CCP module to use the
capture feature. In Asynchronous Counter mode, the
capture operation may not work.
11.1.3
When the Capture mode is changed, a false capture
interrupt may be generated. The user should keep bit
CCP1IE (PIE1<5>) clear to avoid false interrupts and
should clear the flag bit CCP1IF following any such
change in operating mode.
11.1.4
There are four prescaler settings specified by bits
CCP1M<3:0> (CCP1CON<3:0>). Whenever the CCP
module is turned off, or the CCP module is not in Cap-
ture mode, the prescaler counter is cleared. Any Reset
will clear the prescaler counter.
Switching from one capture prescaler to another may
generate an interrupt. Also, the prescaler counter will
not be cleared; therefore, the first capture may be from
a non-zero prescaler. Example 11-1 shows the recom-
mended method for switching between capture
prescalers. This example also clears the prescaler
counter and will not generate the “false” interrupt.
EXAMPLE 11-1:
CLRF
MOVLW
MOVWF
CCP1CON
NEW_CAPT_PS ;Load the W reg with
CCP1CON
TIMER1 MODE SELECTION
SOFTWARE INTERRUPT
CCP PRESCALER
CHANGING BETWEEN
CAPTURE PRESCALERS
 2004 Microchip Technology Inc.
;Turn CCP module off
;the new prescaler
;move value and CCP ON
;Load CCP1CON with this
;value