PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 213
PIC18F2431-I/SP
Manufacturer Part Number
PIC18F2431-I/SP
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F2431-ISP.pdf
(396 pages)
Specifications of PIC18F2431-I/SP
A/d Inputs
5-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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18.0
18.1
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other periph-
eral or microcontroller devices. These peripheral
devices may be Serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
• Serial Peripheral Interface (SPI™)
• Inter-Integrated Circuit (I
An overview of I
tion on the SSP module can be found in the PICmicro
Mid-Range
(DS33023).
Refer to Application Note AN578, “Use of the SSP
module in the I
(DS00578).
2003 Microchip Technology Inc.
SYNCHRONOUS SERIAL PORT
(SSP) MODULE
SSP Module Overview
MCU
2
C operations and additional informa-
2
C™ Multi-Master Environment”
Family
2
C™)
Reference
PIC18F2331/2431/4331/4431
Manual
Preliminary
®
18.2
This section contains register definitions and opera-
tional characteristics of the SPI module. Additional
information on the SPI module can be found in the
PICmicro
(DS33023A).
SPI mode allows 8 bits of data to be synchronously
transmitted and received simultaneously. To accom-
plish communication, typically three pins are used:
• Serial Data Out (SDO) – RC7/RX/DT/SDO
• Serial Data In (SDI) – RC4/INT1/SDI/SDA
• Serial Clock (SCK) – RC5/INT2/SCK/SCL
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS) – RC6/TX/CK/SS
When initializing the SPI, several options need to be
specified. This is done by programming the appropriate
control bits in the SSPCON register (SSPCON<5:0>)
and SSPSTAT<7:6>. These control bits allow the
following to be specified:
• Master mode (SCK is the clock output)
• Slave mode (SCK is the clock input)
• Clock polarity (Idle state of SCK)
• Clock edge (output data on rising/falling edge of
• Clock rate (Master mode only)
• Slave Select mode (Slave mode only)
SCK)
SPI Mode
®
Mid-Range MCU Family Reference Manual
DS39616B-page 211
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