PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 226
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F2431-I/SP
Manufacturer Part Number
PIC18F2431-I/SP
Description
Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F2431-ISP.pdf
(396 pages)
Specifications of PIC18F2431-I/SP
A/d Inputs
5-Channel, 10-Bit
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
24
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
28-pin SPDIP
Programmable Memory
16K Bytes
Ram Size
768 Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2431-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 226 of 396
- Download datasheet (8Mb)
PIC18F2331/2431/4331/4431
REGISTER 19-3:
DS39616B-page 224
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
BAUDCTL: BAUD RATE CONTROL REGISTER
bit 7
Unimplemented: Read as ‘0’
RCIDL: Receive Operation Idle Status bit
1 = Receiver is Idle
0 = Receive in progress
Unimplemented: Read as ‘0’
SCKP: Synchronous Clock Polarity Select bit
Asynchronous mode:
Unused in this mode
Synchronous mode:
1 = Idle state for clock (CK) is a high level
0 = Idle state for clock (CK) is a low level
BRG16: 16-bit Baud Rate Register Enable bit
1 = 16-bit baud rate generator – SPBRGH and SPBRG
0 = 8-bit baud rate generator – SPBRG only (Compatible mode), SPBRGH value ignored
Unimplemented: Read as ‘0’
WUE: Wake-up Enable bit
Asynchronous mode:
1 = USART will continue to sample the RX pin – interrupt generated on falling edge; bit cleared
0 = RX pin not monitored or rising edge detected
Synchronous mode:
Unused in this mode
ABDEN: Auto-Baud Detect Enable bit
Asynchronous mode:
1 = Enable baud rate measurement on the next character – requires reception of a Sync field
0 = Baud rate measurement disabled or completed
Synchronous mode:
Unused in this mode
Legend:
R = Readable bit
- n = Value at POR
U-0
—
in hardware on following rising edge
(55h); cleared in hardware upon completion
RCIDL
R-1
U-0
Preliminary
—
W = Writable bit
‘1’ = Bit is set
R/W-0
SCKP
BRG16
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
2003 Microchip Technology Inc.
x = Bit is unknown
R/W-0
WUE
ABDEN
R/W-0
bit 0
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