PIC24FJ256GB210-I/PT Microchip Technology Inc., PIC24FJ256GB210-I/PT Datasheet - Page 306
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PIC24FJ256GB210-I/PT
Manufacturer Part Number
PIC24FJ256GB210-I/PT
Description
100 TQFP 12x12x1mm TRAY, 16-bit, 256KB Flash, 96K RAM, USB
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC24FJ256GB206-IPT.pdf
(386 pages)
Specifications of PIC24FJ256GB210-I/PT
A/d Inputs
24 Channel, 10-bit
Comparators
3
Cpu Speed
16 MIPS
Eeprom Memory
0 Bytes
Input Output
84
Interface
I2C/SPI/UART/USART/USB
Memory Type
Flash
Number Of Bits
16
Package Type
100-pin TQFP
Programmable Memory
256K Bytes
Ram Size
98K Bytes
Speed
32 MHz
Temperature Range
–40 to 85 °C
Timers
5-16-bit
Voltage, Range
2.2-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ256GB210-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC24FJ256GB210 FAMILY
REGISTER 22-4:
DS39975A-page 306
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-13
bit 12-8
bit 7
bit 6-5
bit 4-0
Note 1:
CH0NB
CH0NA
R/W-0
R/W-0
2:
Combinations not shown here (11100 to 11110) are unimplemented; do not use.
Channel 0 positive inputs, AN16 through AN23, are not available on 64-pin devices (PIC24FJXXXGB206).
CH0NB: Channel 0 Negative Input Select for MUX B Multiplexer Setting bit
1 = Channel 0 negative input is AN1
0 = Channel 0 negative input is V
Unimplemented: Read as ‘0’
CH0SB<4:0>: Channel 0 Positive Input Select for MUX B
Other = Not available; do not use
11111 = No channel used; all inputs are floating; used for CTMU
11011 = Channel 0 positive input is the band gap divided-by-six reference (V
11010 = Channel 0 positive input is the core voltage (V
11001 = Channel 0 positive input is the band gap reference (V
11000 = Channel 0 positive input is the band gap divided-by-two reference (V
10111 = Channel 0 positive input is AN23
.
.
.
00001 = Channel 0 positive input is AN1
00000 = Channel 0 positive input is AN0
CH0NA: Channel 0 Negative Input Select for MUX A Multiplexer Setting bit
1 = Channel 0 negative input is AN1
0 = Channel 0 negative input is V
Unimplemented: Read as ‘0’
CH0SA<4:0>: Channel 0 Positive Input Select for MUX
Other = Not available; do not use
11111 = No Channel used; all inputs are floating; used for CTMU
11011 = Channel 0 positive input is the band gap divided-by-six reference (V
11010 = Channel 0 positive input is the core voltage (V
11001 = Channel 0 positive input is the band gap reference (V
11000 = Channel 0 positive input is the band gap divided-by-two reference (V
10111 = Channel 0 positive input is AN23
.
.
.
00001 = Channel 0 positive input is AN1
00000 = Channel 0 positive input is AN0
U-0
U-0
—
—
AD1CHS: A/D INPUT SELECT REGISTER
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
CH0SB4
CH0SA4
R/W-0
R/W-0
R
R
-
-
(1)
(1)
(2)
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CH0SB3
CH0SA3
R/W-0
R/W-0
(1)
(1)
CAP
(1)
CAP
(1)
)
)
CH0SB2
CH0SA2
R/W-0
R/W-0
BG
BG
)
)
(1)
(1)
2010 Microchip Technology Inc.
x = Bit is unknown
CH0SB1
CH0SA1
R/W-0
R/W-0
BG
BG
BG
BG
/6)
/6)
/2)
/2)
(1)
(1)
CH0SB0
CH0SA0
R/W-0
R/W-0
bit 8
bit 0
(1)
(1)
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