TJA1021T/20/C,118 NXP Semiconductors, TJA1021T/20/C,118 Datasheet
TJA1021T/20/C,118
Specifications of TJA1021T/20/C,118
TJA1021T/20/C-T
TJA1021T/20/C-T
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TJA1021T/20/C,118 Summary of contents
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TJA1021 LIN 2.1/SAE J2602 transceiver Rev. 7 — 25 March 2011 1. General description The TJA1021 is the interface between the Local Interconnect Network (LIN) master/slave protocol controller and the physical bus in a LIN primarily intended for ...
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... NXP Semiconductors 2.3 Protection mechanisms High ESD robustness: 6 kV according to IEC 61000-4-2 for pins LIN, V WAKE_N Transmit data (TXD) dominant time-out function Bus terminal and battery pin protected against transients in the automotive environment (ISO 7637) Bus terminal short-circuit proof to battery and ground ...
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... NXP Semiconductors 5. Block diagram 7 V BAT 3 WAKE_N 2 SLP_N 4 TXD 1 RXD Fig 1. Block diagram TJA1021 Product data sheet WAKE-UP TIMER CONTROL SLEEP/ TEMPERATURE NORMAL PROTECTION TIMER TXD TIME-OUT TIMER TJA1021 BUS TIMER RXD/ INT All information provided in this document is subject to legal disclaimers. ...
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... NXP Semiconductors 6. Pinning information 6.1 Pinning a. TJA1021T/10; TJA1021T/20: SO8 Fig 2. 6.2 Pin description Table 3. Symbol RXD SLP_N WAKE_N TXD GND LIN V BAT INH [1] HVSON8 package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be soldered to board ground. For enhanced thermal and electrical performance recommended that the exposed center pad also be soldered to board ground ...
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... NXP Semiconductors 7. Functional description The TJA1021 is the interface between the LIN master/slave protocol controller and the physical bus in a Local Interconnect Network (LIN). The TJA1021 is LIN 2.1/SAE J2602 compliant and provides optimum ElectroMagnetic Compatibility (EMC) performance due to wave shaping of the LIN output. ...
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... NXP Semiconductors Table 4. Operating modes Mode SLP_N TXD (output) Sleep mode 0 weak pull-down [1] Standby 0 weak pull-down if mode remote wake-up; strong pull-down if local wake-up Normal mode 1 HIGH: recessive state LOW: dominant state Power-on mode 0 weak pull-down [1] Standby mode is entered automatically upon any local or remote wake-up event during Sleep mode. Pin INH and the 30 k termination resistor at pin LIN are switched on ...
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... NXP Semiconductors Standby mode is signalled by a LOW-level on pin RXD which can be used as an interrupt for the microcontroller. In Standby mode (pin SLP_N is still LOW), the condition of pin TXD (weak pull-down or strong pull-down) indicates the wake-up source: weak pull-down for a remote wake-up request and strong pull-down for a local wake-up request. ...
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... NXP Semiconductors A falling edge at pin WAKE_N followed by a LOW level maintained for a certain time period (t pull-up towards pin V unused pin WAKE_N to pin V After a local or remote wake-up, pin INH is activated (it goes HIGH) and the internal slave termination resistor is switched on. The wake-up request is indicated by a LOW active wake-up request signal on pin RXD to interrupt the microcontroller ...
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... NXP Semiconductors The output driver at pin LIN is protected against overtemperature conditions. If the junction temperature exceeds the shutdown junction temperature T protection circuit disables the output driver. The driver is enabled again when the junction temperature has dropped below drops below V BAT enabled again when V Fig 4 ...
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... NXP Semiconductors 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). All voltages are referenced to pin GND; unless otherwise specified. Positive currents flow into the IC. Symbol Parameter V battery supply voltage BAT V voltage on pin TXD TXD V voltage on pin RXD ...
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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter Supply I battery supply current BAT Power-on reset V LOW-level power-on reset th(POR)L threshold voltage V HIGH-level power-on reset th(POR)H threshold voltage ...
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... NXP Semiconductors Table 7. Static characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter Pin SLP_N V HIGH-level input voltage IH V LOW-level input voltage IL V hysteresis voltage hys R pull-down resistance on pin PD(SLP_N) SLP_N I LOW-level input current ...
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... NXP Semiconductors Table 7. Static characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter C capacitance on pin LIN LIN V dominant output voltage o(dom) Thermal shutdown T shutdown junction j(sd) temperature [1] All parameters are guaranteed over the virtual junction temperature range by design. Factory testing uses correlated test conditions to cover the specified temperature and power supply voltage range ...
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... NXP Semiconductors Table 8. Dynamic characteristics 5 +150 BAT vj currents flow into the IC; typical values are given at V Symbol Parameter t rise time r t difference between rise (r-f) and fall time t transmitter propagation tx_pd delay t transmitter propagation tx_sym delay symmetry t receiver propagation ...
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... NXP Semiconductors Fig 5. t bit V TXD LIN BUS V BAT signal V RXD receiving node 1 t rx_pdf V RXD receiving node 2 Fig 6. Timing diagram LIN transceiver TJA1021 Product data sheet WAKE_N SLP_N TXD RXD R RXD C RXD Timing test circuit for LIN transceiver t bit t t bus(dom)(max) ...
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... NXP Semiconductors 12. Application information V DD MICRO- CONTROLLER GND (1) Master nF; slave 220 pF. Fig 7. Typical application of the TJA1021 13. Test information Immunity against automotive transients (malfunction and damage) in accordance with LIN EMC Test Specification / Version 1.0; August 1, 2004. The waveforms of the applied transients are according to ISO7637-2: Draft 2002-12, test pulses 1, 2a, 3a and 3b ...
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... NXP Semiconductors 14. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area Dimensions (1) Unit max 1.00 0.05 0.35 mm nom 0.85 0.03 0.30 0.2 min 0.80 0.00 0.25 Note 1. Plastic or metal protrusions of 0.075 maximum per side are not included. ...
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... NXP Semiconductors 15. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 16. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...
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... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 16.4 Reflow soldering Key characteristics in reflow soldering are: • ...
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... NXP Semiconductors Fig 10. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 17. Soldering of HVSON packages Section 16 Surface Mounted Devices (SMD). A more detailed discussion on soldering HVSON leadless package ICs can found in the following application notes: • ...
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... NXP Semiconductors 18. Revision history Table 11. Revision history Document ID Release date TJA1021 v.7 20110325 • Modifications: Section • Table • Table • Figure TJA1021 v.6 20101230 TJA1021 v.5 20091022 TJA1021 v.4 20090119 TJA1021 v.3 20071008 TJA1021 v.2 20070903 TJA1021 v.1 20061016 TJA1021 ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...
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... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding ...
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... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Low power management . . . . . . . . . . . . . . . . . 1 2.3 Protection mechanisms . . . . . . . . . . . . . . . . . . 2 3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . 5 7 ...