TJA1021T/20/C,118 NXP Semiconductors, TJA1021T/20/C,118 Datasheet - Page 8

• Manufacturer Part Number: TJA1021T/20/C,118
• Description: IC TXRX LIN 2.1/SAE J2602 8-SOIC
• Manufacturer: NXP Semiconductors
• Type: Transceiverr

Specifications of TJA1021T/20/C,118

• Number Of Drivers/receivers: 1/1
• Protocol: LIN
• Voltage - Supply: 5.5 V ~ 27 V
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Operating Supply Voltage (min): 5.5V
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935285394118; TJA1021T/20/C-T; TJA1021T/20/C-T

NXP Semiconductors
TJA1021
Product data sheet
7.10 Fail-safe features
7.7 Wake-up via mode transition
7.8 Wake-up source recognition
7.9 TXD dominant time-out function
A falling edge at pin WAKE_N followed by a LOW level maintained for a certain time
period (t
pull-up towards pin V
unused pin WAKE_N to pin V
After a local or remote wake-up, pin INH is activated (it goes HIGH) and the internal slave
termination resistor is switched on. The wake-up request is indicated by a LOW active
wake-up request signal on pin RXD to interrupt the microcontroller.
It is also possible to set pin INH HIGH with a mode transition towards Normal mode via pin
SLP_N. This is useful for applications with a continuously powered microcontroller.
The TJA1021 can distinguish between a local wake-up request on pin WAKE_N and a
remote wake-up request via a dominant bus state. 'A local wake-up request sets the
wake-up source flag. The wake-up source can be read on pin TXD in the Standby mode. If
an external pull-up resistor on pin TXD to the power supply voltage of the microcontroller
has been added, a HIGH level indicates a remote wake-up request (weak pull-down at pin
TXD) and a LOW level indicates a local wake-up request (strong pull-down at pin TXD;
much stronger than the external pull-up resistor).
The wake-up request flag (signalled on pin RXD) as well as the wake-up source flag
(signalled on pin TXD) are reset immediately after the microcontroller sets pin SLP_N
HIGH.
A TXD dominant time-out timer circuit prevents the bus line from being driven to a
permanent dominant state (blocking all network communication) if pin TXD is forced
permanently LOW by a hardware and/or software application failure. The timer is
triggered by a negative edge on pin TXD. If the duration of the LOW-level on pin TXD
exceeds the internal timer value (t
line into a recessive state. The timer is reset by a positive edge on pin TXD.
Pin TXD provides a pull-down to GND in order to force a predefined level on input pin TXD
in case the pin TXD is unsupplied.
Pin SLP_N provides a pull-down to GND in order to force the transceiver into Sleep mode
in case the pin SLP_N is unsupplied.
Pin RXD is set floating in case of lost power supply on pin V
The current of the transmitter output stage is limited in order to protect the transmitter
against short circuit to pins V
A loss of power (pins V
microcontroller. There are no reverse currents from the bus. The LIN transceiver can be
disconnected from the power supply without influencing the LIN bus.
wake(dom)WAKE_N
All information provided in this document is subject to legal disclaimers.
BAT
BAT
Rev. 7 — 25 March 2011
) results in a local wake-up. The pin WAKE_N provides an internal
. In order to prevent EMI issues, it is recommended to connect an
and GND) has no impact on the bus line and the
BAT
BAT
.
or GND.
to(dom)TXD
), the transmitter is disabled, driving the bus
LIN 2.1/SAE J2602 transceiver
BAT
.
TJA1021
© NXP B.V. 2011. All rights reserved.
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