PIC24HJ128GP510-I/PT Microchip Technology Inc., PIC24HJ128GP510-I/PT Datasheet - Page 121

• Manufacturer Part Number: PIC24HJ128GP510-I/PT
• Description: MCU, 16-Bit, 128KB Flash, 8KB RAM, 85 I/O, TQFP-100
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24HJ128GP510-I/PT

• A/d Inputs: 32 Channel, 12-Bit
• Cpu Speed: 40 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 85
• Interface: CAN/I2C/SPI/UART
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 85
• Number Of Pins: 100
• Package Type: 100-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 8K Bytes
• Speed: 40 MIPS
• Timers: 9-16-bit, 4-32-bit
• Voltage, Range: 3-3.6 V
• Voltage, Rating: 3-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

8.0
The PIC24HJXXXGPX06/X08/X10 oscillator system
provides:
• Various external and internal oscillator options as
FIGURE 8-1:
© 2007 Microchip Technology Inc.
Note:
clock sources
Note 1: See Figure 8-2 for PLL details
OSC2
OSC1
SOSCO
SOSCI
OSCILLATOR
CONFIGURATION
This data sheet summarizes the features
of this group of PIC24HJXXXGPX06/X08/
X10 devices. It is not intended to be a
comprehensive reference source. To com-
plement the information in this data sheet,
refer to the “PIC24H Family Reference
Manual”. Refer to the Microchip web site
(www.microchip.com)
PIC24H
sections.
Oscillator
TUN<5:0>
FRC
Primary Oscillator
Secondary Oscillator
Oscillator
PIC24HJXXXGPX06/X08/X10 OSCILLATOR SYSTEM DIAGRAM
Family
LPRC
LPOSCEN
Reference
S1
÷ 16
S3
for
FRCDIV<2:0>
the
PIC24HJXXXGPX06/X08/X10
Manual
latest
PLL
(1)
PIC24H
XTPLL, HSPLL,
ECPLL, FRCPLL
Clock Fail
• An on-chip PLL to scale the internal operating
• The internal FRC oscillator can also be used with
• Clock switching between various clock sources
• Programmable clock postscaler for system power
• A Fail-Safe Clock Monitor (FSCM) that detects
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
A simplified diagram of the oscillator system is shown
in Figure 8-1.
S7
XT, HS, EC
FRCDIV16
frequency to the required system clock frequency
the PLL, thereby allowing full-speed operation
without any external clock generation hardware
savings
clock failure and takes fail-safe measures
selection.
FRCDIVN
SOSC
LPRC
FRC
Clock Switch
NOSC<2:0> FNOSC<2:0>
S1/S3
S7
S0
S5
S4
S2
S6
÷ 2
Reset
DOZE<2:0>
DS70175F-page 119
WDT, PWRT,
Timer 1
FSCM
F
F
OSC
CY