PIC24HJ128GP510-I/PT Microchip Technology Inc., PIC24HJ128GP510-I/PT Datasheet - Page 166

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PIC24HJ128GP510-I/PT

Manufacturer Part Number
PIC24HJ128GP510-I/PT
Description
MCU, 16-Bit, 128KB Flash, 8KB RAM, 85 I/O, TQFP-100
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24HJ128GP510-I/PT

A/d Inputs
32 Channel, 12-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
85
Interface
CAN/I2C/SPI/UART
Memory Type
Flash
Number Of Bits
16
Number Of Inputs
85
Number Of Pins
100
Package Type
100-pin TQFP
Programmable Memory
128K Bytes
Ram Size
8K Bytes
Speed
40 MIPS
Timers
9-16-bit, 4-32-bit
Voltage, Range
3-3.6 V
Voltage, Rating
3-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC24HJXXXGPX06/X08/X10
17.1
The UART module includes a dedicated 16-bit Baud
Rate Generator. The BRGx register controls the period
of a free-running 16-bit timer. Equation 17-1 shows the
formula for computation of the baud rate with
BRGH = 0.
EQUATION 17-1:
Example 17-1 shows the calculation of the baud rate
error for the following conditions:
• F
• Desired Baud Rate = 9600
The maximum baud rate (BRGH = 0) possible is
F
possible is F
EXAMPLE 17-1:
DS70175F-page 164
CY
Desired Baud Rate
Solving for BRGx Value:
Calculated Baud Rate
Error
Note:
CY
/16 (for BRGx = 0), and the minimum baud rate
= 4 MHz
UART Baud Rate Generator (BRG)
F
frequency (F
CY
CY
Baud Rate =
BRGx =
BRGx
BRGx
BRGx
/(16 * 65536).
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH = 0
16 • Baud Rate
BAUD RATE ERROR CALCULATION (BRGH = 0)
OSC
=
=
=
=
=
=
=
=
=
16 • (BRGx + 1)
F
/2
CY
F
((F
((4000000/9600)/16) – 1
25
4000000/(16 (25 + 1))
9615
(Calculated Baud Rate – Desired Baud Rate)
(9615 – 9600)/9600
0.16%
).
CY
F
CY
/(16 (BRGx + 1))
CY
/Desired Baud Rate)/16) – 1
– 1
Desired Baud Rate
Equation 17-2 shows the formula for computation of
the baud rate with BRGH = 1.
EQUATION 17-2:
The maximum baud rate (BRGH = 1) possible is F
(for BRGx = 0), and the minimum baud rate possible is
F
Writing a new value to the BRGx register causes the
BRG timer to be reset (cleared). This ensures the BRG
does not wait for a timer overflow before generating the
new baud rate.
CY
Note:
/(4 * 65536).
F
frequency (F
CY
Baud Rate =
BRGx =
denotes the instruction cycle clock
UART BAUD RATE WITH
BRGH =
4 • Baud Rate
© 2007 Microchip Technology Inc.
OSC
4 • (BRGx + 1)
F
/2).
CY
F
1
CY
– 1
CY
/4

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