PIC18F26K80-E/SP Microchip Technology Inc., PIC18F26K80-E/SP Datasheet - Page 151

• Manufacturer Part Number: PIC18F26K80-E/SP
• Description: 28 SPDIP .300IN TUBE, ECAN, 64KB FLASH, 4KB RAM, 16 MIPS, 12-BIT ADC, CTMU
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F26K80-E/SP

• A/d Inputs: 8-Channel, 12-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 64K Bytes
• Ram Size: 3.6K Bytes
• Speed: 64 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

9.0
9.1
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows PIC18 devices to be used in many applications
previously reserved for digital-signal processors. A
comparison of various hardware and software multiply
operations, along with the savings in memory and
execution time, is shown in
9.2
Example 9-1
unsigned multiplication. Only one instruction is required
when one of the arguments is already loaded in the
WREG register.
Example 9-2
multiplication. To account for the sign bits of the argu-
ments, each argument’s Most Significant bit (MSb) is
tested and the appropriate subtractions are done.
TABLE 9-1:
 2011 Microchip Technology Inc.
8 x 8 unsigned
16 x 16 signed
8 x 8 signed
unsigned
Routine
16 x 16
8 x 8 HARDWARE MULTIPLIER
Introduction
Operation
shows the instruction sequence for an 8 x 8
shows the sequence to do an 8 x 8 signed
Without hardware multiply
Without hardware multiply
Without hardware multiply
Without hardware multiply
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
Hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Multiply Method
Table
9-1.
Program
Memory
(Words)
13
33
21
28
52
35
1
6
Preliminary
Cycles
(Max)
242
254
69
91
28
40
1
6
PIC18F66K80 FAMILY
EXAMPLE 9-1:
EXAMPLE 9-2:
MOVF
MULWF
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
@ 64 MHz
15.1  s
15.8  s
62.5 ns
375 ns
4.3  s
5.6  s
1.7  s
2.5  s
ARG1, W
ARG2
ARG1, W
ARG2
ARG2, SB
PRODH, F
ARG2, W
ARG1, SB
PRODH, F
@ 48 MHz
83.3 ns
20.1  s
21.2  s
500 ns
5.7  s
7.5  s
2.3  s
3.3  s
8 x 8 UNSIGNED MULTIPLY
ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
Time
@ 10 MHz
101.6  s
27.6  s
36.4  s
96.8  s
11.2  s
16.0  s
400 ns
2.4  s
DS39977C-page 151
- ARG1
- ARG2
@ 4 MHz
242  s
254  s
69  s
91  s
28  s
40  s
1  s
6  s