DSPIC30F4011-30I/P Microchip Technology Inc., DSPIC30F4011-30I/P Datasheet - Page 156

• Manufacturer Part Number: DSPIC30F4011-30I/P
• Description: 16 BIT MCU/DSP 40LD 30MIPS 48 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F4011-30I/P

• A/d Inputs: 9-Channels, 10-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 40-pin PDIP
• Programmable Memory: 48K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F
21.2
21.2.1
While coming out of Power-on Reset or Brown-out
Reset, the device selects its clock source based on two
groups of configuration bits in the F
uration register. The FOS configuration bits select the
oscillator that is used (i.e., primary, FRC, LPRC). The
FPR configuration bits determine the primary oscillator
mode (i.e., HS, XT, XT w/ PLL 4x, etc.
21.2.2
In order to ensure that a crystal oscillator (or ceramic
resonator) has started and stabilized, an oscillator
start-up timer is included. It is a simple 10-bit counter
that counts 1024 T
oscillator clock to the rest of the system. The time-out
period is designated as T
every time the oscillator has to restart (i.e., on POR,
BOR and wake-up from Sleep). The oscillator start-up
timer is applied to the LP Oscillator, XT, XTL, and HS
modes (upon wake-up from Sleep, POR and BOR) for
the primary oscillator.
21.2.3
Enabling the LP oscillator is controlled with two
elements:
1.
2.
The LP oscillator is ON (even during Sleep mode) if
LPOSCEN = 1. The LP oscillator is the device clock if:
• COSC<1:0> = 00 (LP selected as main oscillator)
• LPOSCEN = 1
Keeping the LP oscillator ON at all times allows for a
fast switch to the 32 kHz system clock for lower power
operation. Returning to the faster main oscillator will
still require a start-up time
DS70082G-page 154
and
The current oscillator group bits COSC<1:0>.
The LPOSCEN bit (OSCON register).
Oscillator Configurations
INITIAL CLOCK SOURCE
SELECTION
OSCILLATOR START-UP TIMER
(OST)
LP OSCILLATOR CONTROL
OSC
OST
cycles before releasing the
. The T
OST
OSC
time is involved
device config-
Preliminary
21.2.4
The PLL multiplies the clock which is generated by the
primary oscillator. The PLL is selectable to have either
gains of x4, x8 and x16. Input and output frequency
ranges are summarized in Table 21-2.
TABLE 21-2:
The PLL features a lock output, which is asserted when
the PLL enters a phase locked state. Should the loop
fall out of lock (e.g., due to noise), the lock signal will be
rescinded. The state of this signal is reflected in the
read only LOCK bit in the OSCCON register.
21.2.5
The FRC oscillator is a fast (8 MHz nominal) internal
RC oscillator. This oscillator is intended to provide
reasonable device operating speeds without the use of
an external crystal, ceramic resonator, or RC network.
The FRC oscillator can be used with the PLL to obtain
higher clock frequencies.
The dsPIC30F operates from the FRC oscillator when-
ever the current oscillator selection control bits in the
OSCCON register (OSCCON<13:12>) are set to ‘01’.
The four bit field specified by TUN<3:0> (OSCON
<15:14> and OSCON<11:10>) allows the user to tune
the internal fast RC oscillator (nominal 8.0 MHz). The
user can tune the FRC oscillator within a range of
+10.5% (840 kHz) and -12% (960 kHz) in steps of
1.50% around the factory-calibrated setting, see
Table 21-3.
If OSCCON<13:12> are set to ‘11’ and FPR<3:0> are
set to ‘0001’, ‘1010’ or ‘0011’, then a PLL multiplier of 4,
8 or 16 (respectively) is applied.
4 MHz-10 MHz
4 MHz-10 MHz
4 MHz-7.5 MHz
Note:
Fin
PHASE LOCKED LOOP (PLL)
FAST RC OSCILLATOR (FRC)
When a 16x PLL is used, the FRC
frequency must not be tuned to a
frequency greater than 7.5 MHz.
PLL FREQUENCY RANGE
Multiplier
 2004 Microchip Technology Inc.
PLL
x16
x4
x8
16 MHz-40 MHz
32 MHz-80 MHz
64 MHz-160 MHz
Fout