DSPIC30F4011-30I/P Microchip Technology Inc., DSPIC30F4011-30I/P Datasheet - Page 240

• Manufacturer Part Number: DSPIC30F4011-30I/P
• Description: 16 BIT MCU/DSP 40LD 30MIPS 48 KB FLASH
• Manufacturer: Microchip Technology Inc.
• Type: DSPr

Specifications of DSPIC30F4011-30I/P

• A/d Inputs: 9-Channels, 10-Bit
• Comparators: 4
• Cpu Speed: 30 MIPS
• Eeprom Memory: 1K Bytes
• Input Output: 30
• Interface: CAN, I2C/SPI/UART, USART
• Ios: 30
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 40-pin PDIP
• Programmable Memory: 48K Bytes
• Ram Size: 2K Bytes
• Timers: 5-16-bit, 2-32-bit
• Voltage, Range: 2.5-5.5
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

dsPIC30F
Timing Specifications
U
UART
DS70082G-page 238
Type C Timer External Clock .................................... 199
Watchdog Timer........................................................ 197
PLL Clock.................................................................. 194
Address Detect Mode ............................................... 127
Auto Baud Support.................................................... 128
Baud Rate Generator ................................................ 127
Enabling and Setting Up UART ................................ 125
Loopback Mode ........................................................ 127
Module Overview ...................................................... 123
Operation During CPU Sleep and Idle Modes .......... 128
Receiving Data.......................................................... 126
Alternate I/O...................................................... 125
Disabling ........................................................... 125
Enabling ............................................................ 125
Setting Up Data, Parity and Stop Bit
In 8-bit or 9-bit Data Mode ................................ 126
Interrupt............................................................. 126
Receive Buffer (UxRCB) ................................... 126
Selections ................................................. 125
Preliminary
Unit ID Locations .............................................................. 151
Universal Asynchronous Receiver Transmitter. See UART.
W
Wake-up from Sleep ......................................................... 151
Wake-up from Sleep and Idle ............................................. 55
Watchdog Timer
Watchdog Timer (WDT)............................................ 151, 161
WWW, On-Line Support ..................................................... 12
Reception Error Handling ......................................... 126
Transmitting Data ..................................................... 125
UART1 Register Map................................................ 129
UART2 Register Map................................................ 129
Timing Characteristics .............................................. 196
Timing Requirements................................................ 197
Enabling and Disabling ............................................. 161
Operation .................................................................. 161
Framing Error (FERR) ...................................... 127
Idle Status......................................................... 127
Parity Error (PERR) .......................................... 127
Receive Break .................................................. 127
Receive Buffer Overrun Error (OERR Bit) ........ 126
In 8-bit Data Mode ............................................ 125
In 9-bit Data Mode ............................................ 125
Interrupt ............................................................ 126
Transmit Buffer (UxTXB) .................................. 125
 2004 Microchip Technology Inc.