DSPIC30F4011-30I/P Microchip Technology Inc., DSPIC30F4011-30I/P Datasheet - Page 3

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DSPIC30F4011-30I/P

Manufacturer Part Number
DSPIC30F4011-30I/P
Description
16 BIT MCU/DSP 40LD 30MIPS 48 KB FLASH
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet

Specifications of DSPIC30F4011-30I/P

A/d Inputs
9-Channels, 10-Bit
Comparators
4
Cpu Speed
30 MIPS
Eeprom Memory
1K Bytes
Input Output
30
Interface
CAN, I2C/SPI/UART, USART
Ios
30
Memory Type
Flash
Number Of Bits
16
Package Type
40-pin PDIP
Programmable Memory
48K Bytes
Ram Size
2K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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High Performance Modified RISC CPU:
• Modified Harvard architecture
• C compiler optimized instruction set architecture
• 84 base instructions
• 24-bit wide instructions, 16-bit wide data path
• Linear program memory addressing up to 4M
• Linear data memory addressing up to 64 Kbytes
• Up to 144 Kbytes on-chip Flash program space
• Up to 48K Instruction Words
• Up to 8 Kbytes of on-chip data RAM
• Up to 4 Kbytes of non-volatile data EEPROM
• 16 x 16-bit working register array
• Three Address Generation Units that enable:
• Flexible Addressing modes supporting:
• Two, 40-bit wide accumulators with optional
• 17-bit x 17-bit single cycle hardware fractional/
• Single cycle Multiply-Accumulate (MAC) operation
• 40-stage Barrel Shifter
• Up to 30 MIPs operation:
• Up to 42 interrupt sources
• Vector table with up to 62 vectors
 2004 Microchip Technology Inc.
Note: This data sheet summarizes features of this group
of dsPIC30F devices and is not intended to be a complete
reference source. For more information on the CPU,
peripherals, register descriptions and general device
functionality, refer to the dsPIC30F Family Reference
Manual (DS70046). For more information on the device
instruction set and programming, refer to the dsPIC30F
Programmer’s Reference Manual (DS70030).
dsPIC30F Enhanced Flash 16-bit Digital Signal Controllers
Instruction Words
- Dual data fetch
- Accumulator write back for DSP operations
- Indirect, Modulo and Bit-Reversed modes
saturation logic
integer multiplier
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with
- 8 user selectable priority levels
- 54 interrupt vectors
- 8 processor exceptions and software traps
PLL active (4x, 8x, 16x)
Motor Control and Power Conversion Family
Preliminary
Peripheral Features:
• High current sink/source I/O pins: 25 mA/25 mA
• Up to 5 external interrupt sources
• Timer module with programmable prescaler:
• 16-bit Capture input functions
• 16-bit Compare/PWM output functions
• 3-wire SPI
• I
• Addressable UART modules supporting:
• CAN bus modules
Motor Control PWM Module Features:
• Up to 8 PWM output channels
• Up to 4 duty cycle generators
• Dedicated time base with 4 modes
• Programmable output polarity
• Dead-time control for Complementary mode
• Manual output control
• Trigger for A/D conversions
Quadrature Encoder Interface Module
Features:
• Phase A, Phase B and Index Pulse input
• 16-bit up/down position counter
• Count direction status
• Position Measurement (x2 and x4) mode
• Programmable digital noise filters on inputs
• Alternate 16-bit Timer/Counter mode
• Interrupt on position counter rollover/underflow
- Up to five 16-bit timers/counters; optionally
- Dual Compare mode available
and 7-bit/10-bit addressing
- Interrupt on address bit
- Wake-up on Start bit
- 4 characters deep TX and RX FIFO buffers
- Complementary or Independent Output
- Edge and Center Aligned modes
2
C
pair up 16-bit timers into 32-bit timer modules
modes
TM
module supports Multi-Master/Slave mode
TM
modules (supports 4 Frame modes)
dsPIC30F
DS70082G-page 1

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