PIC24FJ128DA110-I/PT Microchip Technology Inc., PIC24FJ128DA110-I/PT Datasheet - Page 37

• Manufacturer Part Number: PIC24FJ128DA110-I/PT
• Description: 100 TQFP 12x12x1mm TRAY, 16-bit, 128KB Flash, 24K RAM, USB, Graphics
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ128DA110-I/PT

• A/d Inputs: 24 Channel, 10-bit
• Comparators: 3
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 84
• Interface: I2C/SPI/UART/USART/USB
• Memory Type: Flash
• Number Of Bits: 16
• Package Type: 100-pin TQFP
• Programmable Memory: 128K Bytes
• Ram Size: 24K Bytes
• Speed: 32 MHz
• Temperature Range: –40 to 85 °C
• Timers: 5-16-bit
• Voltage, Range: 2.2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part

2.7
If an ICSP compliant emulator is selected as a debug-
ger, it automatically initializes all of the A/D input pins
(ANx) as “digital” pins. Depending on the particular
device, this is done by setting all bits in the ADnPCFG
register(s), or clearing all bit in the ANSx registers.
All PIC24F devices will have either one or more
ADnPCFG registers or several ANSx registers (one for
each port); no device will have both. Refer to
(Section 23.0 “10-Bit High-Speed A/D Converter”)
for more specific information.
The bits in these registers that correspond to the A/D
pins that initialized the emulator must not be changed
by
communication errors will result between the debugger
and the device.
 2010 Microchip Technology Inc.
the
Configuration of Analog and
Digital Pins During ICSP
Operations
user
application
firmware;
otherwise,
PIC24FJ256DA210 FAMILY
If your application needs to use certain A/D pins as
analog input pins during the debug session, the user
application must modify the appropriate bits during
initialization of the ADC module, as follows:
• For devices with an ADnPCFG register, clear the
• For devices with ANSx registers, set the bits
When a Microchip debugger/emulator is used as a
programmer, the user application firmware must
correctly configure the ADnPCFG or ANSx registers.
Automatic initialization of this register is only done
during debugger operation. Failure to correctly
configure the register(s) will result in all A/D pins being
recognized as analog input pins, resulting in the port
value being read as a logic '0', which may affect user
application functionality.
2.8
Unused I/O pins should be configured as outputs and
driven to a logic low state. Alternatively, connect a 1 kΩ
to 10 kΩ resistor to V
output to logic low.
bits corresponding to the pin(s) to be configured
as analog. Do not change any other bits, particu-
larly those corresponding to the PGECx/PGEDx
pair, at any time.
corresponding to the pin(s) to be configured as
analog. Do not change any other bits, particularly
those corresponding to the PGECx/PGEDx pair,
at any time.
Unused I/Os
SS
on unused pins and drive the
DS39969B-page 37