PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 146

• Manufacturer Part Number: PIC16F1947-I/PT
• Description: 64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F1947-I/PT

• A/d Inputs: 17-Channel, 10-Bit
• Comparators: 3
• Cpu Speed: 8 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 54
• Interface: CAN/I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 28K Bytes
• Ram Size: 1K Bytes
• Speed: 32 MHz
• Timers: 4-8-bit, 1-16-bit
• Voltage, Range: 1.8-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F/LF1946/47
12.8
PORTG is a 8-bit wide, bidirectional port. The
corresponding
(Register
corresponding PORTG pin an input (i.e., put the
corresponding output driver in a High-Impedance mode).
Clearing a TRISG bit (= 0) will make the corresponding
PORTG pin an output (i.e., enable the output driver and
put the contents of the output latch on the selected pin).
Example 12-4
Reading the PORTG register
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then written
to the PORT data latch (LATG).
The TRISG register
PORTG pin output drivers, even when they are being
used as analog inputs. The user should ensure the bits
in the TRISG register are maintained set when using
them as analog inputs. I/O pins configured as analog
input always read ‘0’.
12.8.1
The ANSELG register
configure the Input mode of an I/O pin to analog.
Setting the appropriate ANSELG bit high will cause all
digital reads on the pin to be read as ‘0’ and allow
analog functions on the pin to operate correctly.
The state of the ANSELG bits has no affect on digital
output functions. A pin with TRIS clear and ANSEL set
will still operate as a digital output, but the Input mode
will be analog. This can cause unexpected behavior
when executing read-modify-write instructions on the
affected port.
EXAMPLE 12-7:
DS41414B-page 146
BANKSEL
CLRF
BANKSEL
CLRF
BANKSEL
CLRF
BANKSEL
MOVLW
MOVWF
Note:
PORTG Registers
12-25). Setting a TRISG bit (= 1) will make the
PORTG
PORTG
LATG
LATG
ANSELG
ANSELG
TRISG
B'11110000' ;Set RG<7:4> as inputs
TRISG
ANSELG REGISTER
The ANSELG register must be initialized
to configure an analog channel as a digital
input. Pins configured as analog inputs
will read ‘0’.
shows how to initialize PORTG.
data
INITIALIZING PORTG
direction
(Register
(Register
;
;Init PORTG
;Data Latch
;
;
;digital I/O
;
;and set RG<3:0> as
;outputs
(Register
12-25) controls the
register
12-27) is used to
12-24) reads the
is
TRISG
Preliminary
12.8.2
Each PORTG pin is multiplexed with other functions. The
pins, their combined functions and their output priorities
are briefly described here. For additional information,
refer to the appropriate section in this data sheet.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the lowest number in
the following lists.
Analog input and some digital input functions are not
included in the list below. These input functions can
remain active when the pin is configured as an output.
Certain digital input functions override other port
functions and are included in the priority list.
RG0
1.
2.
3.
RG1
1.
2.
3.
4.
5.
6.
RG2
1.
2.
3.
4.
5.
RG3
1.
2.
3.
4.
5.
6.
RG4
1.
2.
3.
4.
5.
6.
RG5
1.
CCP3 (CCP)
P3A (CCP)
SEG42 (LCD)
AN15 (ADC)
CPS15 (CSM)
TX2 (EUSART)
CK2 (EUSART)
C3OUT (Comparator)
SEG43 (LCD)
AN14 (ADC)
CPS14 (CSM)
DT2/RX2 (EUSART)
C3IN+ (Comparator)
SEG44 (LCD)
AN13 (ADC)
CPS13 (CSM)
C3IN0- (Comparator)
CCP4 (CCP)
P3D (CCP)
SEG45 (LCD)
AN12 (ADC)
CPS12 (CSM)
C3IN1- (Comparator)
CCP5 (CCP)
P1D (CCP)
SEG26 (LCD)
V
PP
/MCLR (Basic)SEG18 (LCD)
PORTG FUNCTIONS AND OUTPUT
PRIORITIES
 2010 Microchip Technology Inc.