PIC16F1947-I/PT Microchip Technology Inc., PIC16F1947-I/PT Datasheet - Page 352

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PIC16F1947-I/PT

Manufacturer Part Number
PIC16F1947-I/PT
Description
64 TQFP 10x10x1mm TRAY28KB Flash, 1KB RAM, 256B EEPROM, LCD, 1.8-5.5V
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F1947-I/PT

A/d Inputs
17-Channel, 10-Bit
Comparators
3
Cpu Speed
8 MIPS
Eeprom Memory
256 Bytes
Input Output
54
Interface
CAN/I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
28K Bytes
Ram Size
1K Bytes
Speed
32 MHz
Timers
4-8-bit, 1-16-bit
Voltage, Range
1.8-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F/LF1946/47
27.9
LCD waveforms are generated so that the net AC
voltage across the dark pixel should be maximized and
the net AC voltage across the clear pixel should be
minimized. The net DC voltage across any pixel should
be zero.
The COM signal represents the time slice for each
common, while the SEG contains the pixel data.
The pixel signal (COM-SEG) will have no DC
component and it can take only one of the two RMS
values. The higher RMS value will create a dark pixel
and a lower RMS value will create a clear pixel.
As the number of commons increases, the delta
between the two RMS values decreases. The delta
represents the maximum contrast that the display can
have.
FIGURE 27-8:
DS41414B-page 352
COM0
LCD Waveform Generation
TYPE-A/TYPE-B WAVEFORMS IN STATIC DRIVE
segment voltage
segment voltage
COM0-SEG0
COM0-SEG1
COM0 pin
SEG0 pin
SEG1 pin
(inactive)
(active)
Preliminary
The LCDs can be driven by two types of waveform:
Type-A and Type-B. In Type-A waveform, the phase
changes within each common type, whereas in Type-B
waveform, the phase changes on each frame
boundary. Thus, Type-A waveform maintains 0 V
over a single frame, whereas Type-B waveform takes
two frames.
Figure 27-8
for static, half-multiplex, 1/3-multiplex and 1/4-multiplex
drives for Type-A and Type-B waveforms.
Note 1: If Sleep has to be executed with LCD
1 Frame
2: When the LCD clock source is F
Sleep disabled (LCDCON<SLPEN> is
‘1’), then care must be taken to execute
Sleep only when V
‘0’.
if Sleep is executed, irrespective of the
LCDCON<SLPEN> setting, the LCD
immediately goes into Sleep. Thus, take
care to see that V
when Sleep is executed.
through
Figure 27-18
 2010 Microchip Technology Inc.
DC
DC
on all the pixels is
on all pixels is ‘0’
provide waveforms
OSC
V
V
V
V
V
V
V
V
-V
V
/256,
1
0
1
0
1
0
1
0
0
1
DC

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