PAC-POWR1220AT8-HS-EVN Lattice, PAC-POWR1220AT8-HS-EVN Datasheet - Page 39

• Manufacturer Part Number: PAC-POWR1220AT8-HS-EVN
• Description: Supervisory Circuits Pwr Mgr Hercules Std Development Kit
• Manufacturer: Lattice
• Series: ispPAC®, MachXO, Herculesr

Specifications of PAC-POWR1220AT8-HS-EVN

• Silicon Manufacturer: Lattice Semiconductor
• Kit Application Type: Power Management
• Application Sub Type: Power Manager
• Kit Contents: Preloaded Board, Eval Board, AC Adapter, USB Connector Cable
• Rohs Compliant: Yes
• Main Purpose: Power Management, ORing Controller / Hot Swap Controller
• Embedded: Yes, Other
• Utilized Ic / Part: ispPAC-POWR1220AT8, LCMXO2280
• Primary Attributes: -
• Secondary Attributes: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
The ispPAC-POWR1220AT8 also provides the user with the ability to program the trim values over the I
by writing the appropriate binary word to the associated trim register (Figure 1-30).
Figure 1-30. I
2
C Trim Registers
0x13 - TRIM1_TRIM (Read/Write)
0x14 - TRIM2_TRIM (Read/Write)
0x15 - TRIM3_TRIM (Read/Write)
0x16 - TRIM4_TRIM (Read/Write)
0x17 - TRIM5_TRIM (Read/Write)
0x18 - TRIM6_TRIM (Read/Write)
0x19 - TRIM7_TRIM (Read/Write)
0x1A - TRIM8_TRIM (Read/Write)
D7
D7
D7
D7
D7
D7
D7
D7
b7
b7
b7
b7
b7
b7
b7
b7
D6
D6
D6
D6
D6
D6
D6
D6
b6
b6
b6
b6
b6
b6
b6
b6
D5
D5
D5
D5
D5
D5
D5
D5
b5
b5
b5
b5
b5
b5
b5
b5
D4
D4
D4
D4
D4
D4
D4
D4
b4
b4
b4
b4
b4
b4
b4
b4
1-39
D3
D3
D3
D3
D3
D3
D3
D3
b3
b3
b3
b3
b3
b3
b3
b3
ispPAC-POWR1220AT8 Data Sheet
D2
D2
D2
D2
D2
D2
D2
D2
b2
b2
b2
b2
b2
b2
b2
b2
D1
D1
D1
D1
D1
D1
D1
D1
b1
b1
b1
b1
b1
b1
b1
b1
D0
D0
D0
D0
D0
D0
D0
D0
b0
b0
b0
b0
b0
b0
b0
b0
2
C interface,