PEB24901HV1.2 Lantiq, PEB24901HV1.2 Datasheet - Page 10

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PEB24901HV1.2

Manufacturer Part Number
PEB24901HV1.2
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB24901HV1.2

Lead Free Status / Rohs Status
Supplier Unconfirmed
Table 1
Pin Definitions and Functions (cont’d)
Pin No. Symbol
Miscellaneous Function Pins
Semiconductor Group
29
20
52
61
30
35
42
47
31
37
CLS0
CLS1
CLS2
CLS3
D0A
D0B
D0C
D0D
D1A
D1B
Input (I)
Output (O)
O
O
O
O
O
O
O
O
O
O
Description
120 KHz transmit clock of channel 0
120 KHz transmit clock of channel 1
120 KHz transmit clock of channel 2
120 KHz transmit clock of channel 3
Driver pin of line port 0, can be set with
Monitor command, bit A. Default after
Pin-reset is low. C/I-code reset does not
affect the state
Driver pin of line port 0, can be set with
Monitor command, bit B. Default after
Pin-reset is low. C/I-code reset does not
affect the state
Driver pin of line port 0, can be set with
Monitor command, bit C. Default after
Pin-reset is low. C/I-code reset does not
affect the state
Driver pin of line port 0, can be set with
Monitor command, bit D. Default after
Pin-reset is low. C/I-code reset does not
affect the state
Driver pin of line port 1, can be set with
Monitor command, bit A. Default after
Pin-reset is low. C/I-code reset does not
affect the state
Driver pin of line port 1, can be set with
Monitor command, bit B. Default after
Pin-reset is low. C/I-code reset does not
affect the state
9
PEB 24901
Reference
3.2.1.2.3
3.2.1.2.3
3.2.1.2.3
3.2.1.2.3
3.2.1.2.3
3.2.1.2.3
02.95

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