PEB24901HV1.2 Lantiq, PEB24901HV1.2 Datasheet - Page 18

• Manufacturer Part Number: PEB24901HV1.2
• Manufacturer: Lantiq

Specifications of PEB24901HV1.2

• Lead Free Status / Rohs Status: Supplier Unconfirmed

The IOM-2 interface is a four-wire serial interface with a data clock (DCL), an 8 kHz
frame synchronization clock (FSC), and one data line per direction: data downstream
(DD) and data upstream (DU).
The basic channel consists of a total of 32 bits, or four octets: 18 bits for B1 + B2 + D plus
14 overhead bits for monitor and control information (activation/deactivation of OSI layer
1 and maintenance functions).
The ISDN user data rate is 144 kbit/s (B1 + B2 + D). Within one FSC period, 32 bit up
to 256 bit are transmitted, corresponding to DCL frequencies ranging from 512 kHz up
to 4096 kHz. The data is transmitted transparently synchronous and in phase in both
directions over the IOM-2 interface using time division multiplexing within the 125 s
IOM-2 interface frame. As the IEC Quad DFT-T occupies four IOM-slots, the following
data rates apply:
Nominal bit rate of data (DD and DU):
Nominal frequency of DCL:
Nominal frequency of FSC:
Figure 5 illustrates the multiplexed frame strucure of the IOM-2 interface.
The data is latched with the odd numbered rising edges of DCL as given in fig. 5 lower
part.
Figure 5: IOM-2 Interface and bit timing
Semiconductor Group
FSC
DCL
DIN
FSC
DCL
DIN
DOUT
slot 0
slot 0
B1
slot 1
slot 1
data latched
slot2
slot2
B2
slot3
slot3
17
12.5 µs
slot 4
slot 4
Monitor
2048 kHz
1024 kbit/s … 2048 kbit/s
8 kHz
slot5
slot5
D
slot6
slot6
C/I
… 4096 kHz
slot7
slot7
MR MX
PEB 24901
02.95