PIC18F6585-I/PT Microchip Technology Inc., PIC18F6585-I/PT Datasheet - Page 400
![no-image](/images/manufacturer_photos/0/4/440/microchip_technology_inc__sml.jpg)
PIC18F6585-I/PT
Manufacturer Part Number
PIC18F6585-I/PT
Description
64 PIN, 48 KB FLASH, 3328 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC18F6585-IPT.pdf
(496 pages)
Specifications of PIC18F6585-I/PT
A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
53
Interface
CAN/I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
48K Bytes
Ram Size
3.3K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F6585-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F6585-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC18F6585/8585/6680/8680
RLNCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS30491C-page 398
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
REG
Q1
=
=
register ‘f’
Rotate Left f (no carry)
[ label ]
0
d
a
(f<n>)
(f<7>)
N, Z
The contents of register ‘f’ are
rotated one bit to the left. If ‘d’ is ‘0,’
the result is placed in W. If ‘d’ is ‘1’,
the result is stored back in register
‘f’ (default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the
BSR value (default).
1
1
RLNCF
Read
Q2
0100
1010 1011
0101 0111
f
[0,1]
[0,1]
255
dest<n+1>,
dest<0>
RLNCF
01da
Process
REG, 1, 0
Data
Q3
register f
ffff
f [,d [,a]]
destination
Write to
Q4
ffff
RRCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
C
REG
W
C
Q1
=
=
=
=
=
register ‘f’
Rotate Right f through Carry
[ label ]
0
d
a
(f<n>)
(f<0>)
(C)
C, N, Z
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the result
is placed in W. If ‘d’ is ‘1’, the result
is placed back in register ‘f’
(default). If ‘a’ is ‘0’, the Access
Bank will be selected, overriding
the BSR value. If ‘a’ is ‘1’, then the
bank will be selected as per the
BSR value (default).
1
1
RRCF
Read
0011
Q2
1110 0110
0
1110 0110
0111 0011
0
f
[0,1]
[0,1]
2004 Microchip Technology Inc.
C
dest<7>
255
dest<n-1>,
C,
RRCF
00da
Process
REG, 0, 0
Data
register f
Q3
f [,d [,a]]
ffff
destination
Write to
Q4
ffff
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