PIC16C72A-04/SO Microchip Technology Inc., PIC16C72A-04/SO Datasheet - Page 18
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PIC16C72A-04/SO
Manufacturer Part Number
PIC16C72A-04/SO
Description
28 PIN, 3.5 KB OTP, 128 RAM, 22 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C72A-04SO.pdf
(120 pages)
Specifications of PIC16C72A-04/SO
A/d Inputs
5-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
22
Memory Type
OTP
Number Of Bits
8
Package Type
28-pin SOIC
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
4 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC16C62B/72A
2.5
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer ).
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-1.
FIGURE 2-3:
DS35008B-page 18
RP1:RP0
bank select
(1)
Note 1: Maintain clear for upward compatibility with future products.
Indirect Addressing, INDF and FSR
Registers
2: Not implemented.
location select
6
Direct Addressing
DIRECT/INDIRECT ADDRESSING
Data
Memory
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
Preliminary
100h
17Fh
Bank 2
10
(2)
not used
EXAMPLE 2-1:
NEXT
CONTINUE
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-3. However, IRP is not used in the
PIC16C62B/72A.
180h
1FFh
Bank 3
11
(2)
IRP
movlw
movwf
clrf
incf
btfss
goto
:
(1)
bank select
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
0x20
FSR
INDF
FSR
FSR,4 ;all done?
NEXT
7
Indirect Addressing
1999 Microchip Technology Inc.
;initialize pointer
;
;clear INDF register
;inc pointer
;NO, clear next
;YES, continue
FSR register
to RAM
location select
0