ADC10065CIMT/HALF National Semiconductor, ADC10065CIMT/HALF Datasheet - Page 3

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ADC10065CIMT/HALF

Manufacturer Part Number
ADC10065CIMT/HALF
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of ADC10065CIMT/HALF

Lead Free Status / Rohs Status
Supplier Unconfirmed
ANALOG I/O
DIGITAL I/O
Pin Descriptions and Equivalent Circuits
Pin No.
12
13
15
28
6
7
4
8
1
5
IRS (Input Range
Symbol
Select)
STBY
V
V
V
V
CLK
V
V
REFB
DF
REFT
COM
REF
IN
IN
+
Equivalent Circuit
3
Inverting analog input signal. With a 1.2V reference the full-scale
input signal level is a differential 1.0 V
V
Non-inverting analog input signal. With a 1.2V reference the full-
scale input signal level is a differential 1.0 V
Reference input. This pin should be bypassed to V
µF monolithic capacitor. V
driven by a 1.20V external reference if desired. Do not load this pin.
These pins are high impedance reference bypass pins only.
Connect a 0.1 µF capacitor from each of these pins to V
pins should not be loaded. V
common mode voltage, V
Digital clock input. The range of frequencies for this input is
20 MHz to 65 MHz. The input is sampled on the rising edge of this
input.
DF = “1” Two’s Complement
DF = “0” Offset Binary
This is the standby pin. When high, this pin sets the converter into
standby mode. When this pin is low, the converter is in active mode.
IRS = “V
IRS = “V
IRS = “Floating” 1.0 V
If using both V
peak-to-peak voltage refers to the differential voltage (V
COM
(pin 4) for single-ended operation.
DDA
SSA
” 1.5 V
” 2.0 V
IN
+ and V
P-P
P-P
P-P
differential input range
differential input range
IN
differential input range
- pins, (or differential mode), then the
CM
REF
Description
.
COM
is 1.20V nominal. This pin may be
may be used to set the input
P-P
. This pin may be tied to
P-P
.
SSA
www.national.com
with a 0.1
SSA
IN
+ - V
. These
IN
-).