LAN8187I-JT SMSC, LAN8187I-JT Datasheet - Page 41

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LAN8187I-JT

Manufacturer Part Number
LAN8187I-JT
Description
TXRX ETHERNET 10/100 ESD PROT
Manufacturer
SMSC
Type
Transceiverr
Datasheets

Specifications of LAN8187I-JT

Protocol
Ethernet
Voltage - Supply
1.6 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Drivers/receivers
-
Other names
Q4223799

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Part Number:
LAN8187I-JT
Manufacturer:
Standard
Quantity:
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High-Performance MII and RMII 10/100 Ethernet PHY with HP Auto-MDIX
Datasheet
SMSC LAN8187/LAN8187I
ADDRESS
ADDRESS
1.10:6
0.6:0
0.15
0.14
0.13
0.12
0.10
1.15
1.14
1.13
1.12
0.11
1.11
0.9
0.8
0.7
1.5
1.4
100Base-TX Half
100Base-TX Full
Auto-Negotiate
Speed Select
Duplex Mode
Collision Test
Restart Auto-
10Base-T Half
Power Down
10Base-T Full
Remote Fault
Negotiation
100Base-T4
Loopback
Negotiate
Reserved
Reserved
Complete
Enable
NAME
Isolate
Reset
Duplex
Duplex
Duplex
Duplex
Auto-
NAME
1 = software reset. Bit is self-clearing. For best results,
1 = loopback mode,
0 = normal operation
1 = 100Mbps,
0 = 10Mbps.
Ignored if Auto Negotiation is enabled (0.12 = 1).
1 = enable auto-negotiate process
0 = disable auto-negotiate process
1 = General power down mode,
0 = normal operation
1 = electrical isolation of PHY from MII
0 = normal operation
1 = restart auto-negotiate process
0 = normal operation. Bit is self-clearing.
1 = Full duplex,
0 = Half duplex.
1 = enable COL test,
0 = disable COL test
Ignored if Auto Negotiation is enabled (0.12 = 1).
1 = T4 able,
0 = no T4 ability
1 = TX with full duplex,
0 = no TX full duplex ability
1 = TX with half duplex,
0 = no TX half duplex ability
1 = 10Mbps with full duplex
0 = no 10Mbps with full duplex ability
1 = 10Mbps with half duplex
0 = no 10Mbps with half duplex ability
1 = auto-negotiate process completed
0 = auto-negotiate process not completed
1 = remote fault condition detected
0 = no remote fault
Table 5.30 Register 0 - Basic Control
Table 5.31 Register 1 - Basic Status
when setting this bit do not set other bits in this
register.
(overrides 0.13 and 0.8)
DATASHEET
DESCRIPTION
DESCRIPTION
41
MODE
MODE
RW/
RW/
RW
RW
RW
RW
RW
RW
RW
RO
SC
SC
Revision 0.6 (02-24-06)
RO/
RO
RO
RO
RO
RO
RO
LH
MODE[2:0]
MODE[2:0]
MODE[2:0]
MODE[2:0]
DEFAULT
DEFAULT
Set by
Set by
Set by
Set by
bus
bus
bus
bus
0
0
0
0
0
0
0
1
1
1
1
0
0

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