MM912H634CM1AER2 Freescale Semiconductor, MM912H634CM1AER2 Datasheet - Page 200

• Manufacturer Part Number: MM912H634CM1AER2
• Description: 64KS12 LIN2xLS/HS Isense
• Manufacturer: Freescale Semiconductor
• Series: -r

Specifications of MM912H634CM1AER2

• Applications: Automotive
• Core Processor: HCS12
• Program Memory Type: FLASH (64 kB)
• Controller Series: HCS12
• Ram Size: 6K x 8
• Interface: LIN
• Number Of I /o: -
• Voltage - Supply: 5.5 V ~ 27 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.32.3.2
This section consists of the DBG control and trace buffer register descriptions in address order. Each comparator has a bank of
registers that are visible through an 8-byte window between 0x0028 and 0x002F in the DBG module register address map. When
ARM is set in DBGC1, the only bits in the DBG module registers that can be written are ARM, TRIG, and COMRV[1:0]
4.32.3.2.1
Read: Anytime
Write: Bits 7, 1, 0 anytime
Bit 6 can be written anytime but always reads back as 0.
Bits 4:3 anytime DBG is not armed.
Freescale Semiconductor
Note:
Address: 0x0020
173.
174.
175.
176.
Address
0x002E
0x002F
Reset
W
R
This bit is visible at DBGCNT[7] and DBGSR[7]
This represents the contents if the Comparator A control register is blended into this address.
This represents the contents if the Comparator B control register is blended into this address.
This represents the contents if the Comparator C control register is blended into this address.
DBGADHM
DBGADLM
ARM
Name
Register Descriptions
7
0
Debug Control Register 1 (DBGC1)
When disarming the DBG by clearing ARM with software, the contents of bits[4:3] are not
affected by the write, since up until the write operation, ARM = 1 preventing these bits from
being written. These bits must be cleared using a second write if required.
W
W
R
R
TRIG
6
0
0
Bit 15
Bit 7
Bit 7
= Unimplemented or Reserved
Table 269. Quick Reference to DBG Registers
Table 270. Debug Control Register (DBGC1)
MM912_634 Advance Information, Rev. 4.0
14
5
0
0
6
6
13
5
5
BDM
NOTE
4
0
12
4
4
DBGBRK
3
0
11
3
3
2
0
0
10
2
2
1
0
1
9
1
COMRV
Bit 0
Bit 8
Bit 0
0
0
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