PIC32MX675F512L-80V/BG Microchip Technology, PIC32MX675F512L-80V/BG Datasheet - Page 65
![512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX675F512L-80V/BG
Manufacturer Part Number
PIC32MX675F512L-80V/BG
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/BG
Processor Series
PIC32MX6xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
64 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-3:
Legend:
Note
10A0
10B0
10C0
1000
1010 INTSTAT
1020
1030
1040
1050
1060
1070
1080
1090
1:
2:
3:
INTCON
IPTMR
IEC0
IEC1
IEC2
IPC0
IPC1
IPC2
IPC3
IFS0
IFS1
IFS2
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Except where noted, all registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC respectively. See
Registers”
These bits are not available on PIC32MX664 devices.
This register does not have associated CLR, SET, and INV registers.
(3)
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
INTERRUPT REGISTER MAP FOR PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H AND
PIC32MX695F512H DEVICES
for more information.
I2C1MIE
I2C1MIF
RTCCIF
RTCCIE
IC3EIE
INT3IF
IC3EIF
INT3IE
31/15
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
FSCMIE
I2C1SIF
FSCMIF
I2C1SIE
IC2EIF
IC2EIE
OC3IF
OC3IE
30/14
FRZ
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
I2C1BIE
I2C1BIF
IC1EIF
IC1EIE
29/13
IC3IF
IC3IE
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
SPI3TXIE SPI3RXIE
SPI3TXIF SPI3RXIF
I2C3MIF
I2C3MIE
U1TXIF
U1TXIE
ETHIE
MVEC
ETHIF
28/12
T3IF
T3IE
—
—
—
—
—
—
—
—
(1)
INT0IP<2:0>
INT1IP<2:0>
INT2IP<2:0>
INT3IP<2:0>
CS0IP<2:0>
IC1IP<2:0>
IC2IP<2:0>
IC3IP<2:0>
I2C3SIF
I2C3SIE
U1RXIF
U5TXIF
U1RXIE
U5TXIE
INT2IF
INT2IE
27/11
—
—
—
—
—
—
—
—
—
—
SPI4TXIF SPI4RXIF
SPI4TXIE SPI4RXIE
I2C5MIE
SPI3EIF
I2C3BIF
I2C5MIF
SPI3EIE
I2C3BIE
U5RXIE
U2TXIF
U5RXIF
U2TXIE
OC2IF
U1EIE
OC2IE
U1EIF
26/10
—
—
—
—
—
—
SRIPL<2:0>
TPC<2:0>
I2C5SIF
U2RXIE
I2C5SIE
U2RXIF
USBIF
USBIE
U5EIE
U5EIF
IC2IF
IC2IE
25/9
—
—
—
—
—
—
INT0IS<1:0>
INT1IS<1:0>
INT2IS<1:0>
INT3IS<1:0>
CS0IS<1:0>
IC1IS<1:0>
IC2IS<1:0>
IC3IS<1:0>
SPI4EIE
SPI4EIF
I2C5BIF
I2C5BIE
U6TXIF
U6TXIE
FCEIF
U2EIF
FCEIE
U2EIE
T2IE
24/8
T2IF
—
—
—
—
—
—
IPTMR<31:0>
Bits
DMA7IF
DMA7IE
SPI2TXIF SPI2RXIF
SPI2TXIE SPI2RXIE
I2C4MIF
I2C4MIE
U6RXIF
U3TXIE
U6RXIE
U3TXIF
INT1IF
INT1IE
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(2)
(2)
DMA6IF
DMA6IE
I2C4SIE
U3RXIF
I2C4SIF
U3RXIE
OC5IE
OC1IE
OC5IF
OC1IF
U6EIF
U6EIE
22/6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(2)
(2)
DMA5IF
DMA5IE
SPI2EIF
I2C4BIF
SPI2EIE
I2C4BIE
U4TXIF
U4TXIE
U3EIF
U3EIE
IC5IF
IC1IF
IC5IE
IC1IE
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
(2)
(2)
DMA4IF
DMA4IE
CMP2IF
CMP2IE
U4RXIE
INT4EP
U4RXIF
20/4
T5IF
T1IF
T5IE
T1IE
—
—
—
—
(2)
(2)
OC1IP<2:0>
OC2IP<2:0>
OC3IP<2:0>
CS1IP<2:0>
CTIP<2:0>
T1IP<2:0>
T2IP<2:0>
T3IP<2:0>
DMA3IF
CMP1IF
DMA3IE
CMP1IE
INT3EP
INT4IE
INT0IE
INT4IF
INT0IF
U4EIE
U4EIF
19/3
—
—
—
—
VEC<5:0>
Section 12.1.1 “CLR, SET and INV
PMPEIE
DMA2IF
PMPEIF
DMA2IE
INT2EP
PMPIF
PMPIE
OC4IF
CS1IF
OC4IE
CS1IE
18/2
—
—
—
—
INT1EP
DMA1IF
DMA1IE
IC5EIF
IC5EIE
CS0IF
AD1IF
CS0IE
AD1IE
IC4IF
IC4IE
17/1
—
—
—
—
OC1IS<1:0>
OC2IS<1:0>
OC3IS<1:0>
CS1IS<1:0>
CTIS<1:0>
T1IS<1:0>
T2IS<1:0>
T3IS<1:0>
DMA0IE
INT0EP
DMA0IF
IC4EIF
IC4EIE
CNIF
CTIE
CNIE
T4IF
CTIF
T4IE
16/0
SS0
—
—
—
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
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