PIC32MX675F512L-80V/BG Microchip Technology, PIC32MX675F512L-80V/BG Datasheet - Page 97
![512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX675F512L-80V/BG
Manufacturer Part Number
PIC32MX675F512L-80V/BG
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/BG
Processor Series
PIC32MX6xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
64 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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TABLE 4-26:
TABLE 4-27:
Legend:
Note
Legend:
60A0
60B0
6080
6090
60A0
60B0
6080
6090 PORTC
1:
PORTC
TRISC
ODCC
2:
TRISC
ODCC
LATC
LATC
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
information.
x = unknown value on Reset; — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
All registers in this table have corresponding CLR, SET and INV registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See
mation.
31:16
31:16
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
15:0
15:0
PORTC REGISTER MAP FOR PIC32MX534F064H, PIC32MX564F064H, PIC32MX564F128H, PIC32MX575F256H,
PIC32MX575F512H, PIC32MX664F064H, PIC32MX664F128H, PIC32MX675F256H, PIC32MX675F512H, PIC32MX695F512H,
PIC32MX764F128H, PIC32MX775F256H, PIC32MX775F512H AND PIC32MX795F512H DEVICES
PORTC REGISTER MAP FOR PIC32MX534F064L, PIC32MX564F064L, PIC32MX564F128L, PIC32MX575F256L,
PIC32MX575F512L, PIC32MX664F064L, PIC32MX664F128L, PIC32MX675F256L, PIC32MX675F512L, PIC32MX695F512L,
PIC32MX764F128L, PIC32MX775F256L, PIC32MX775F512L AND PIC32MX795F512L DEVICES
TRISC15
ODCC15
LATC15
TRISC15
ODCC15
LATC15
31/15
RC15
31/15
RC15
—
—
—
—
—
—
—
—
TRISC14
ODCC14
TRISC14
LATC14
ODCC14
LATC14
30/14
RC14
30/14
RC14
—
—
—
—
—
—
—
—
TRISC13
ODCC13
TRISC13
ODCC13
LATC13
LATC13
29/13
RC13
29/13
RC13
—
—
—
—
—
—
—
—
TRISC12
ODCC12
TRISC12
ODCC12
LATC12
LATC12
28/12
RC12
28/12
RC12
—
—
—
—
—
—
—
—
27/11
27/11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
26/10
26/10
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
25/9
25/9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
24/8
24/8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Bits
Bits
23/7
23/7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
22/6
22/6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
21/5
21/5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TRISC4
ODCC4
LATC4
20/4
RC4
20/4
—
—
—
—
—
—
—
—
—
—
—
—
Section 12.1.1 “CLR, SET and INV Registers”
Section 12.1.1 “CLR, SET and INV Registers”
TRISC3
ODCC3
LATC3
19/3
RC3
19/3
—
—
—
—
—
—
—
—
—
—
—
—
(1)
(1)
TRISC2
ODCC2
LATC2
18/2
RC2
18/2
—
—
—
—
—
—
—
—
—
—
—
—
TRISC1
ODCC1
LATC1
17/1
RC1
17/1
—
—
—
—
—
—
—
—
—
—
—
—
16/0
16/0
for more
for more infor-
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0000
F00F
0000
xxxx
0000
xxxx
0000
0000
0000
F000
0000
xxxx
0000
xxxx
0000
0000
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