ZL2106ALCFTK Intersil, ZL2106ALCFTK Datasheet - Page 23

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ZL2106ALCFTK

Manufacturer Part Number
ZL2106ALCFTK
Description
6A Digital DC-DC Converter W/ DDC - TR1K
Manufacturer
Intersil
Series
-r
Type
Step-Down (Buck), PWM - Voltage Moder
Datasheet

Specifications of ZL2106ALCFTK

Internal Switch(s)
Yes
Synchronous Rectifier
Yes
Number Of Outputs
1
Voltage - Output
0.54 V ~ 5.5 V
Current - Output
6A
Frequency - Switching
200kHz ~ 1MHz
Voltage - Input
4.5 V ~ 14 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
36-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ZL2106ALCFTK
Manufacturer:
INTERSIL
Quantity:
201
I
The ZL2106 provides an I
the user to configure all aspects of the device operation as well
as monitor the input and output parameters. The ZL2106 can be
used with any standard 2-wire I
In addition, the device is compatible with SMBus version 2.0 and
includes an SALRT line to help mitigate bandwidth limitations
related to continuous fault monitoring. Pull-up resistors are
required on the I
specification. The ZL2106 accepts most standard PMBus
commands. When controlling the device with PMBus commands,
it is recommended that the enable pin is tied to SGND.
I
When communicating with multiple devices using the
I
address so the host can distinguish between the devices. The
device address can be set according to the pin-strap options
listed in Table 14. Address values are right-justified.
If additional device addresses are required, a resistor can be
connected to the SA pin according to Table 15 to provide up to 30
unique device addresses.
Digital-DC Bus
The Digital-DC Communications (DDC) bus is used to
communicate between Zilker Labs Digital-DC devices. This
dedicated bus provides the communication channel between
devices for features such as sequencing and fault spreading. The
DDC pin on all Digital-DC devices in an application should be
connected together. A pull-up resistor is required on the DDC bus
in order to guarantee the rise time as expressed in Equation 15:
Where R
loading. The pull-up resistor may be tied to VRA or to an external
3.3V or 5V supply as long as this voltage is present prior to or
during device power-up. As rules of thumb, each device
connected to the DDC bus presents approximately 10pF of
capacitive loading, and each inch of FR4 PCB trace introduces
approximately 2pF. The ideal design will use a central pull-up
resistor that is well matched to the total load capacitance. In
power module applications, the user should consider whether to
place the pull-up resistor on the module or on the PCB of the end
application.
Rise Time = R
2
2
2
C/SMBus interface, each device must have its own unique
C/SMBus Communications
C/SMBus Device Address Selection
SA PIN SETTING
PU
TABLE 14. SMBUS DEVICE ADDRESS SELECTION
OPEN
HIGH
LOW
is the DDC bus pull-up resistance and C
PU
2
•C
C/SMBus as specified in the SMBus 2.0
LOAD
≈ 1µs
2
C/SMBus digital interface that enables
23
2
C host device.
SMBus ADDRESS
0x20
0x21
0x22
LOAD
is the bus
(EQ. 15)
ZL2106
The minimum pull-up resistance should be limited to a value that
enables any device to assert the bus to a voltage that will ensure
a logic 0 (typically 0.8V at the device monitoring point) given the
pull-up voltage (5V if tied to VRA) and the pull-down current
capability of the ZL2106 (nominally 4mA).
12.1
13.3
14.7
16.2
19.6
21.5
23.7
26.1
28.7
31.6
34.8
38.3
42.2
46.4
51.1
56.2
61.9
68.1
82.5
90.9
(kΩ)
17.8
133
100
110
121
147
162
R
10
11
75
TABLE 15. SMBus ADDRESS VALUES
SA
SMBus Address
0x2A
0x2B
0x2D
0x3A
0x3B
0x3D
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2C
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3C
FN6852.4

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