ADV202-ASD-P160-EB Analog Devices Inc, ADV202-ASD-P160-EB Datasheet - Page 16

• Manufacturer Part Number: ADV202-ASD-P160-EB
• Manufacturer: Analog Devices Inc

Specifications of ADV202-ASD-P160-EB

• Lead Free Status / Rohs Status: Not Compliant

ADV202
STREAMING MODE (JDATA)—FIFO READ/WRITE
Table 10.
Parameter
JDATA
VALID
HOLD
HOLD
JDATA
JDATA
1
For a definition of JCLK, see the PLL section.
TD
SU
HD
TD
SU
HD
JDATA
JDATA
MCLK
VALID
MCLK
VALID
HOLD
HOLD
Description
MCLK to JDATA Valid
MCLK to VALID Assert/Deassert
HOLD Setup to Rising MCLK
HOLD Hold from Rising MCLK
JDATA Setup to Rising MCLK
JDATA Hold from Rising MCLK
JDATA
VALID
TD
SU
JDATA
VALID
JDATA
TD
TD
HD
Figure 19. Streaming Mode Timing—Encode Mode JDATA Output
Figure 20. Streaming Mode Timing—Decode Mode JDATA Input
JDATA
JDATA
HD
SU
HOLD
HOLD
Rev. C | Page 16 of 40
SU
SU
Min
1.5
1.5
3
3
3
3
HOLD
HD
Typ
HOLD
Max
2.5 × JCLK + 7.0 ns
2.5 × JCLK + .7.0 ns
HD
Unit
JCLK cycles
JCLK cycles
ns
ns
ns
ns
1