ADV202-ASD-P160-EB Analog Devices Inc, ADV202-ASD-P160-EB Datasheet - Page 8

• Manufacturer Part Number: ADV202-ASD-P160-EB
• Manufacturer: Analog Devices Inc

Specifications of ADV202-ASD-P160-EB

• Lead Free Status / Rohs Status: Not Compliant

ADV202
NORMAL HOST MODE—WRITE OPERATION
Table 5.
Parameter
t
t
t
t
t
t
t
t
t
t
t
1
ACK
ACK
SD
HD
SA
HA
SC
HC
WH
WL
WCYC
For a definition of JCLK, see the PLL section.
(Direct)
(Indirect)
HDATA
ADDR
ACK
Description
WE to ACK, Direct Registers and FIFO Accesses
WE to ACK, Indirect Registers
Data Setup
Data Hold
Address Setup
Address Hold
CS to WE Setup
CS Hold
Write Inactive Pulse Width (Minimum Time Until Next WE Pulse)
Write Active Pulse Width
Write Cycle Time
WE
CS
t
t
SC
SA
t
ACK
Figure 4. Normal Host Mode—Write Operation
t
WL
t
SD
VALID
Rev. C | Page 8 of 40
t
t
HC
HD
t
HA
t
WCYC
t
WH
Min
5
5
3.0
1.5
2
2
0
0
2.5
2.5
5
Typ
Max
1.5 × JCLK
2.5 × JCLK + 7.0
1
+ 7.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
JCLK
JCLK
JCLK