MK60DN512ZVMD10 Freescale Semiconductor, MK60DN512ZVMD10 Datasheet - Page 61

• Manufacturer Part Number: MK60DN512ZVMD10
• Description: KINETIS 512K ENET
• Manufacturer: Freescale Semiconductor

Specifications of MK60DN512ZVMD10

• Processor Series: K60
• Core: ARM Cortex M4
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• Interface Type: USB, CAN, SPI, I2C, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 2
• Number Of Timers: 2
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-144
• Operating Temperature Range: - 40 C to + 105 C
• Processor To Be Evaluated: MK60DN512ZVMD10
• Supply Current (max): 185 mA
• Lead Free Status / Rohs Status: No

6.8.7 DSPI switching specifications (full voltage range)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Freescale Semiconductor, Inc.
Num
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Num
DS9
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Operating voltage
Frequency of operation
Operating voltage
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Table 43. Slave mode DSPI timing (limited voltage range)
Table 44. Master mode DSPI timing (full voltage range)
Figure 23. DSPI classic SPI timing — slave mode
K60 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011.
Description
DS13
DS15
Description
Table continues on the next page...
First data
First data
DS14
DS10
DS12
Data
Data
Peripheral operating requirements and behaviors
1.71
Min.
—
(t
DS11
SCK
4 x t
Min.
2.7
DS9
—
—
—
/2) − 2
0
2
7
Last data
Last data
BUS
Max.
12.5
3.6
DS16
(t
SCK
Max.
12.5
3.6
10
14
14
—
—
—
—
/2) + 2
MHz
Unit
V
MHz
Unit
Notes
ns
ns
ns
ns
ns
ns
ns
ns
V
1
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