ADV7184BSTZ Analog Devices Inc, ADV7184BSTZ Datasheet - Page 52

IC DECODER VID SDTV MULTI 80LQFP

ADV7184BSTZ

Manufacturer Part Number
ADV7184BSTZ
Description
IC DECODER VID SDTV MULTI 80LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7184BSTZ

Applications
Projectors, Recorders, Security
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
80-LQFP
Resolution (bits)
10bit
Adc Sample Rate
54MSPS
Power Dissipation Pd
550mW
No. Of Input Channels
12
Supply Voltage Range
1.65V To 2V, 3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Tv /
RoHS Compliant
Input Format
Analogue
Output Format
Digital
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7184BSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
ADV7184
PVENDDELO, PAL Vsync End Delay on Odd Field,
Address 0xE9 [7]
0 (default)—No delay.
1—Delays vsync going low on an odd field by a line relative
to PVEND.
PVENDDELE, PAL Vsync End Delay on Even Field,
Address 0xE9 [6]
0 (default)—No delay.
1—Delays vsync going low on an even field by a line relative
to PVEND.
PVENDSIGN, PAL Vsync End Sign, Address 0xE9 [5]
0 (default)—Delays the end of vsync. Set for user manual
programming.
1—Advances the end of vsync. Not recommended for user
programming.
NOT VALID FOR USER
PROGRAMMING
VSYNC BY PVBEG[4:0]
ADVANCE BEGIN OF
ADVANCE BY
PVBEGDELO
ADDITIONAL
DELAY BY
0.5 LINE
VSBHO
1 LINE
YES
Figure 34. PAL Vsync Begin
1
1
1
VSYNC BEGIN
0
0
PVBEGSIGN
ODD FIELD?
0
0
VSYNC BY PVBEG[4:0]
DELAY BEGIN OF
ADVANCE BY
PVBEGDELE
ADDITIONAL
DELAY BY
0
0.5 LINE
VSBHE
1 LINE
NO
1
1
Rev. A | Page 52 of 112
PVEND [4:0], PAL Vsync End, Address 0xE9 [4:0]
The default value of PVEND is 10100, indicating the PAL vsync
end position.
For all NTSC/PAL vsync timing controls, both the V bit in the
AV code and the vsync on the VS pin are modified.
PFTOGDELO, PAL Field Toggle Delay on Odd Field,
Address 0xEA [7]
0 (default)—No delay.
1—Delays the F toggle/transition on an odd field by a line
relative to PFTOG.
PFTOGDELE, PAL Field Toggle Delay on Even Field,
Address 0xEA [6]
0 (default)—No delay.
1 (default)—Delays the F toggle/transition on an even field by a
line relative to PFTOG.
NOT VALID FOR USER
PROGRAMMING
VSYNC BY PVEND[4:0]
ADVANCE END OF
ADVANCE BY
PVENDDELO
ADDITIONAL
DELAY BY
0.5 LINE
VSEHO
1 LINE
YES
1
1
Figure 35. PAL Vsync End
1
0
0
ODD FIELD?
PVENDSIGN
VSYNC END
0
0
DELAY END OF VSYNC
BY PVEND[4:0]
ADVANCE BY
ADDITIONAL
PVENDDELE
DELAY BY
0
0.5 LINE
VSEHE
1 LINE
NO
1
1

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