ADV7188BSTZ Analog Devices Inc, ADV7188BSTZ Datasheet - Page 23

IC DECODER VID MULTIFORM 80LQFP

ADV7188BSTZ

Manufacturer Part Number
ADV7188BSTZ
Description
IC DECODER VID MULTIFORM 80LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of ADV7188BSTZ

Applications
Set-Top Boxes, Video Players, Recorders
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
80-LQFP
Resolution (bits)
12bit
Input Format
Analog
Output Format
Digital
Adc Sample Rate
54MSPS
No. Of Input Channels
12
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7188BSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
GLOBAL STATUS REGISTERS
Three registers provide summary information about the video
decoder: Status Register 1, Status Register 2, and Status Register 3.
These registers contain status bits that report operational information
to the user.
Status Register 1 [7:0], Address 0x10 [7:0]
This read-only register provides information about the internal
status of the ADV7188. See the CIL [2:0], Count-Into-Lock,
Address 0x51 [2:0] and the COL [2:0], Count-Out-of-Lock,
Address 0x51 [5:3] sections for information on the timing.
Depending on the setting of the FSCLE bit, the IN_LOCK [0] and
LOST_LOCK [1] bits of Status Register 1 are based solely on the
horizontal timing information or on the horizontal timing and
lock status of the color subcarrier. See the FSCLE, F Lock
Enable, Address 0x51 [7]
AD_RESULT [2:0], Autodetection Result, Address 0x10 [6:4]
These bits report the findings from the autodetection block. For
more information on enabling the autodetection block, see the
Table 21. Status Register 1 Function
Status Register 1 [7:0]
0
1
2
3
4
5
6
7
Table 22. Status Register 2 Function
Status Register 2 [7:0]
0
1
2
3
4
5
6
7
Table 23. Status Register 3 Function
Status Register 3 [7:0]
0
1
2
3
4
5
6
7
section.
Bit Name
INST_HLOCK
GEMD
SD_OP_50HZ
CVBS
FREE_RUN_ACT
STD_FLD_LEN
INTERLACED
PAL_SW_LOCK
Bit Name
MVCS DET
MVCS T3
MV_PS DET
MV_AGC DET
LL_NSTD
FSC_NSTD
Reserved
Reserved
Bit Name
IN_LOCK
LOST_LOCK
FSC_LOCK
FOLLOW_PW
AD_RESULT.0
AD_RESULT.1
AD_RESULT.2
COL_KILL
Description
Horizontal lock indicator (instantaneous).
Gemstar detect.
Flags whether 50 Hz or 60 Hz is present at output.
Indicates if a CVBS signal is detected in composite/S-video autodetection configuration
Indicates if the ADV7188 is in free-run mode. Outputs a blue screen by default. See the
DEF_VAL_AUTO_EN, Default Value Automatic Enable, Address 0x0C [1] section for details
about disabling this function.
Field length is correct for currently selected video standard.
Interlaced video detected (field sequence found).
Reliable sequence of swinging bursts detected.
Lost lock (since last read of this register)
F
AGC follows peak white algorithm.
Result of autodetection.
Result of autodetection.
Result of autodetection.
Color kill is active
Detected Macrovision color striping.
Description
In lock (now)
Description
Macrovision color striping protection. Conforms to Type 3 if high, Type 2 if low.
Detected Macrovision pseudosync pulses.
Detected Macrovision AGC pulses.
Line length is nonstandard.
F
SC
SC
SC
locked (now)
frequency is nonstandard
Rev. A | Page 23 of 112
General Setup section. For information on configuring this
block, see the Autodetection of SD Modes section.
Table 20. AD_RESULT Function
AD_RESULT [2:0]
000
001
010
011
100
101
110
111
Status Register 2 [7:0], Address 0x12 [7:0]
See Table 22.
Status Register 3 [7:0], Address 0x13 [7:0]
See Table 23.
NTSC M/J
PAL B/G/H/I/D
Description
NTSC 443
PAL M
PAL 60
SECAM
PAL Combination N
SECAM 525
ADV7188

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