ADV7321KSTZ Analog Devices Inc, ADV7321KSTZ Datasheet - Page 65

IC VID ENC 6-12BIT DAC'S 64LQFP

ADV7321KSTZ

Manufacturer Part Number
ADV7321KSTZ
Description
IC VID ENC 6-12BIT DAC'S 64LQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7321KSTZ

Applications
EVD, DVD, SD/PS/HDTV
Voltage - Supply, Analog
2.5V
Voltage - Supply, Digital
2.5V
Mounting Type
Surface Mount
Package / Case
64-LQFP
Input Format
Digital
Output Format
Analog
Supply Voltage Range
2.375V To 2.625V
Operating Temperature Range
0°C To +70°C
Tv / Video Case Style
LQFP
No. Of Pins
64
Msl
MSL 1 - Unlimited
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7321KSTZ
Manufacturer:
Micrel
Quantity:
2 023
Part Number:
ADV7321KSTZ
Manufacturer:
ADI
Quantity:
329
Part Number:
ADV7321KSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADV7321KSTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
APPENDIX 1—COPY GENERATION MANAGEMENT SYSTEM
PS CGMS
Data Registers 2 to 0
[Subaddresses 0x21, 0x22, 0x23]
525p
Using the vertical blanking interval 525p system, 525p CGMS
conforms to the CGMS-A EIA-J CPR1204-1 (March 1998)
transfer method of video identification information and to the
IEC61880 (1998) 525p/60 video system’s analog interface for the
video and accompanying data.
When PS CGMS is enabled [Subaddress 0x12, Bit 6 = 1], CGMS
data is inserted on Line 41. The 525p CGMS data registers are at
Addresses 0x21, 0x22, and 0x23.
625p
The 625p CGMS conforms to the IEC62375 (2004) 625p/50
video system’s analog interface for the video and accompanying
data using the vertical blanking interval.
When PS CGMS is enabled [Subaddress 0x12, Bit 6 = 1], CGMS
data is inserted on Line 43. The 625p CGMS data registers are at
Addresses 0x22, and 0x23.
HD CGMS
[Address 0x12, Bit 6]
The ADV7320/ADV7321 support copy generation management
system (CGMS) in HDTV mode (720p and 1080i) in
accordance with EIAJ CPR-1204-2.
The HD CGMS data registers are found at Addresses 0x021,
0x22, and 0x23.
Rev. A | Page 65 of 88
SD CGMS
Data Registers 2 to 0
[Subaddresses 0x59, 0x5A, 0x5B]
The ADV7320/ADV7321 support copy generation management
system (CGMS), conforming to the EIAJ CPR-1204 and ARIB
TR-B15 standards. CGMS data is transmitted on Line 20 for
odd fields and Line 283 for even fields. Bits C/W05 and C/W06
control whether CGMS data is output on odd or even fields. CGMS
data can only be transmitted when the ADV7320/ADV7321 are
configured in NTSC mode. The CGMS data is 20 bits long. The
CGMS data is preceded by a reference pulse of the same amplitude
and duration as a CGMS bit (see Figure 94).
720p System
CGMS data is applied to Line 24 of the luminance vertical
blanking interval.
1080i System
CGMS data is applied to Line 19 and Line 582 of the luminance
vertical blanking interval.
CGMS FUNCTIONALITY
If SD CGMS CRC [Address 0x59, Bit 4] or PS/HD CGMS CRC
[Subaddress 0x12, Bit 7] is set to Logic 1, the last six bits, C19 to
C14, which compose the 6-bit CRC check sequence, are
automatically calculated on the ADV7320/ADV7321. This
calculation is based on the lower 14 bits (C0 to C13) of the data
in the data registers and output with the remaining 14 bits to
form the complete 20 bits of the CGMS data. The calculation of
the CRC sequence is based on the polynomial x
preset value of 111111. If SD CGMS CRC [Address 0x59, Bit 4]
and PS/HD CGMS CRC [Address 0x12, Bit 7] are set to Logic 0,
all 20 bits (C0 to C19) are output directly from the CGMS
registers (CRC must be manually calculated by the user).
ADV7320/ADV7321
6
+ x + 1 with a

Related parts for ADV7321KSTZ