ADV7183AKST Analog Devices Inc, ADV7183AKST Datasheet - Page 8

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ADV7183AKST

Manufacturer Part Number
ADV7183AKST
Description
IC VIDEO DECODER NTSC 80-LQFP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheet

Specifications of ADV7183AKST

Applications
Projectors, Recorders, Security
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
80-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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ADV7183A
TIMING SPECIFICATIONS
Guaranteed by characterization. A
temperature range, unless otherwise noted.
Table 3.
Parameter
SYSTEM CLOCK AND CRYSTAL
I
RESET FEATURE
CLOCK OUTPUTS
DATA AND CONTROL OUTPUTS
ANALOG SPECIFICATIONS
Guaranteed by characterization. A
temperature range, unless otherwise noted. Recommended analog input video signal range: 0.5 V – 1.6 V, typically 1 V p-p.
Table 4.
Parameter
CLAMP CIRCUITRY
THERMAL SPECIFICATIONS
Table 5.
Parameter
THERMAL CHARACTERISTICS
2
C PORT
Nominal Frequency
Frequency Stability
SCLK Frequency
SCLK Min Pulse Width High
SCLK Min Pulse Width Low
Hold Time (Start Condition)
Setup Time (Start Condition)
SDA Setup Time
SCLK and SDA Rise Time
SCLK and SDA Fall Time
Setup Time for Stop Condition
Reset Pulse Width
LLC1 Mark Space Ratio
LLC1 Rising to LLC2 Rising
LLC1 Rising to LLC2 Falling
Data Output Transitional Time
Data Output Transitional Time
Propagation Delay to Hi-Z
Max Output Enable Access Time
Min Output Enable Access Time
External Clamp Capacitor
Input Impedance
Large Clamp Source Current
Large Clamp Sink Current
Fine Clamp Source Current
Fine Clamp Sink Current
Junction-to-Case Thermal Resistance
Junction-to-Ambient Thermal Resistance (Still Air)
VDD
VDD
= 3.15 V to 3.45 V, D
= 3.15 V to 3.45 V, D
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
1
2
3
4
5
6
7
8
9
11
12
13
14
15
16
17
:t
10
θ
Symbol
θ
JC
JA
Test Conditions
Negative clock edge to start of
valid data (t
End of valid data to negative
clock edge (t
VDD
VDD
Test Conditions
Clamps switched off
Rev. B | Page 8 of 104
= 1.65 V to 2.0 V, D
= 1.65 V to 2.0 V, D
Test Conditions
4-layer PCB with solid ground plane
4-layer PCB with solid ground plane
ACCESS
HOLD
= t
= t
10
9
+ t
– t
14
VDDIO
VDDIO
13
)
)
= 3.0 V to 3.6 V, P
= 3.0 V to 3.6 V, P
Min
0.6
1.3
0.6
0.6
100
5
45:55
Min
Min
VDD
VDD
Typ
27.00
0.6
0.5
0.5
6
7
4
Typ
0.1
10
0.75
0.75
60
60
= 1.65 V to 2.0 V; operating
= 1.65 V to 2.0 V; operating
Typ
7.6
38.1
Max
±50
400
300
300
55:45
6
0.6
Max
Max
Unit
MHz
ppm
kHz
µs
µs
µs
µs
ns
ns
ns
µs
ms
% Duty Cycle
ns
ns
ns
ns
ns
ns
ns
Unit
µF
MΩ
mA
mA
µA
µA
Unit
°C/W
°C/W

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