MAX1464AAI+ Maxim Integrated Products, MAX1464AAI+ Datasheet - Page 20

• Manufacturer Part Number: MAX1464AAI+
• Description: IC SENSOR SIGNAL COND 28-SSOP
• Manufacturer: Maxim Integrated Products
• Type: Signal Conditionerr

Specifications of MAX1464AAI+

• Input Type: Analog
• Output Type: Logic
• Interface: SPI
• Current - Supply: 890µA
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Power, Low-Noise Multichannel
Sensor Signal Processor
Figure 8. Serial Interface Data Input
Figure 9. 4-Wire Mode Data Read from DHR Register
Figure 10. 3-Wire Mode Data Read from DHR Register
There are 4096 bytes of programmable/erasable FLASH
memory for CPU program instructions and coefficients
storage. In addition, there are 128 bytes of FLASH mem-
ory accessible only by the serial interface for storage of
user information data.
These two FLASH memory locations are separated as
partitions. The program/coefficient memory is FLASH
partition 0 and the information memory is FLASH parti-
tion 1. Each partition is accessible by the serial inter-
face for reading, erasing, and writing data. Program/
coefficient memory partition 0 is accessible by the CPU
as read only, and partition 1 is not accessible by the
CPU. The CPU cannot erase or write data to either of
the FLASH memory partitions.
FLASH partition 0 is selected during the POR cycle.
FLASH partition 1 is selected by sending the halt CPU
command (IRS[7:0] = 78h) and changing the partition
selected by sending the change partition command
20
SCLK
DO
SCLK
CS
DI
CS
DO
DI
______________________________________________________________________________________
IRSA0
1
CS
SCLK
DI
DHR15
IRSA1
IRSA0
IRS0
0
IRSA2
0
DHR14
IRSA1
IRS1
IRSA3
1
IRSD0
DHR13
IRSA2
IRS2
1
IRSA0
IRS0
IRSD1
0
DHR12
IRSA3
IRS3
IRSD2
0
IRSA1
IRS1
IRSD3
DHR11
IRSD0
FLASH Memory
IRS4
0
DHR10
IRSD1
IRS5
IRSA2
IRS2
DHR15 DHR14 DHR13 DHR12 DHR11 DHR10 DHR9 DHR8 DHR7 DHR6 DHR5 DHR4 DHR3 DHR2 DHR1 DHR0
IRSD2
DHR9
IRS6
IRSA3
IRS3
IRSD3
DHR8
IRS7
IRSA0
DHR7
IRS0
(IRS[7:0] = F8h). A following halt command (IRS[7:0] =
78h) resets the selected partition to partition 0.
The MAX1464 FLASH memory contents must be erased
(contents = FFh) before the desired contents can be writ-
ten. There is no individual byte-erase command, but
either a total-erase command (IRS[7:0] = E8h) where all
the selected partition is erased (4kB for partition 0 or 128
bytes for partition 1) or a page-erase command (IRS[7:0]
= D8h), where only 64 bytes are erased, and the page is
selected by PFAR[11:6]. There are 64 pages in FLASH
partition 0, and only 2 pages in FLASH partition 1.
The programming of the MAX1464 FLASH memory
must use the following procedure (all the commands
are to be sent through the serial interface, and are
hexadecimal values of IRS[7:0]):
IRSD0
IRS4
IRSA1
DHR6
IRS1
IRSD1
IRS5
IRSA2
DHR5
IRS2
IRSA3
DHR4
IRS3
IRSD2
IRS6
Modifying the FLASH Contents
IRSD0
DHR3
IRS4
IRSD3
IRS7
IRSD1
DHR2
IRS5
IRSD2
DHR1
IRS6
IRSD3
DHR0
IRS7