TLE72422GXT Infineon Technologies, TLE72422GXT Datasheet - Page 11

• Manufacturer Part Number: TLE72422GXT
• Manufacturer: Infineon Technologies

Specifications of TLE72422GXT

• Operating Temperature (max): 150C
• Operating Temperature (min): -40C
• Pin Count: 28
• Mounting: Surface Mount
• Screening Level: Automotive
• Lead Free Status / Rohs Status: Compliant

Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Data Sheet
Symbol
NEG1
NEG0
POS0
OUT1
OUT0
BAT
PHASE_SYNC
TEST
SI
V_SIGNAL
SO
GND_D
CLK
V5D
SCK
CS_B
ENABLE
RESET_B
FAULT
I/O
I
I
I
O
O
I
I
I
I
I
O
-
I
-
I
I
I
I
O
Analog
/Digital
A
A
A
A
A
A
D
D
D
-
D
-
D
-
D
D
D
D
D
Function
Channel #1 Negative sense pin. Connect to the "FET" side of the
external sense resistor.
Channel #0 Negative sense pin. Connect to the "FET" side of the
external sense resistor.
Channel #0 Positive sense pin. Connect to the "load" side of the
external sense resistor.
Gate driver output for channel #1. Connect to the gate of the
external MOSFET.
Gate driver output for channel #0. Connect to the gate of the
external MOSFET.
Battery sense input for over voltage detection. Connect through a
series resistor (e.g. 1 Kohm) to the solenoid supply voltage. A
large electrolytic capacitor (e.g. 47uF) should be placed between
the BAT supply and ground.
Used to synchronize the rising edges of the PWM signal on the
OUTx pins for each channel.
Used for IC Test. Must be connected to GND_D for specified
operation of the IC.
SPI Serial data in
Supply pin for the SPI SO output and the pull-ups of the digital
inputs CS_B and RESET_B. An external capacitor must be con-
nected between this pin and GND_D near this pin.
SPI Serial data out
GND pin for digital and driver circuitry.
Main clock input for the IC. A clock input of 20 MHz to 40 MHz is
required.
5V supply pin for the digital circuit blocks and the OUT pin driver
circuits. A pair of external capacitors is to be connected between
this pin and GND_D very near this pin. Example values of the
external capacitors are 100nF and 100pF.
SPI Clock input
SPI Chip Select Bar (low active signal)
When this input pin is low all channels are turned off (zero current)
or remain in their last state, depending on how the channel is
programmed to respond
When this input pin is low all channels are turned off and all
internal registers are reset to their default state. The part must be
held in reset by an external source until all supplies are stable and
within tolerance.
This open drain output pin is pulled low when a fault condition is
detected. Certain faults can be masked via SPI.
11
Rev. 1.0, 2008-07-09
Pin Configuration
TLE7242-2G