DS1876T+T&R Maxim Integrated Products, DS1876T+T&R Datasheet - Page 42

• Manufacturer Part Number: DS1876T+T&R
• Description: IC CTRLR SFP DUAL LDD 28TQFN
• Manufacturer: Maxim Integrated Products
• Type: SFP Laser Controllerr

Specifications of DS1876T+T&R

• Input Type: Logic
• Output Type: Logic
• Interface: I²C
• Current - Supply: 10mA
• Mounting Type: Surface Mount
• Package / Case: 28-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SFP Controller with Dual LDD Interface
Table 01h, Register F9h: RESERVED
Table 01h, Register FAh: ALARM EN
Table 01h, Register FBh: RESERVED
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FAh
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
This register is reserved.
Layout is identical to ALARM
Figure 9). The MASK bit (Table 02h, Register 88h) determines whether this memory exists in Table 01h or 05h.
POWER-ON VALUE
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
This register is reserved.
RESERVED
BITS 7:4, 2
BIT 7
BIT 3
BIT 1
BIT 0
RESERVED
HBAL: Enables alarm to create internal signal FETG.
0 = Disables interrupt from HBAL alarm.
1 = Enables interrupt from HBAL alarm.
TXP HI: Enables alarm to create internal signal FETG.
0 = Disables interrupt from TXP HI alarm.
1 = Enables interrupt from TXP HI alarm.
TXP LO: Enables alarm to create internal signal FETG.
0 = Disables interrupt from TXP LO alarm.
1 = Enables interrupt from TXP LO alarm.
RESERVED
1
1
N/A
N/A
N/A
N/A
in Lower Memory, Register 72h. Enables alarms to create internal signal FETG (see
N/A
N/A
N/A
N/A
00h
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
PW2 or (PW1 and RWTBL1C)
Different A2h and B2h memory locations
Nonvolatile (SEE)
RESERVED
RESERVED
HBAL
RESERVED
TXP HI
TXP LO
BIT 0