DS1876T+T&R Maxim Integrated Products, DS1876T+T&R Datasheet - Page 57

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DS1876T+T&R

Manufacturer Part Number
DS1876T+T&R
Description
IC CTRLR SFP DUAL LDD 28TQFN
Manufacturer
Maxim Integrated Products
Type
SFP Laser Controllerr
Datasheet

Specifications of DS1876T+T&R

Input Type
Logic
Output Type
Logic
Interface
I²C
Current - Supply
10mA
Mounting Type
Surface Mount
Package / Case
28-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 02h, Register BDh: HBIAS1 DAC
Table 02h, Register BEh: HTXP1 DAC
Table 02h, Register BFh: LTXP1 DAC
BDh
BEh
BFh
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
The digital value used for the HBIAS1 reference and recalled from Table 06h (Registers E0h–E7h) (transmitter 1) at
the adjusted memory address found in TINDEX. This register is updated at the end of the temperature conversion.
Comparisons greater than V
The digital value used for the HTXP1 reference and recalled from Table 06h (Registers E8h–EFh) (transmitter 1) at
the adjusted memory address found in TINDEX. This register is updated at the end of the temperature conversion.
Comparisons great than V
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
A2h AND B2h MEMORY
MEMORY TYPE
The digital value used for the LTXP1 reference and recalled from Table 06h (Registers F0h–F7h) (transmitter 1) at
the adjusted memory address found in TINDEX. This register is updated at the end of the temperature conversion.
Comparisons less than V
______________________________________________________________________________________
BIT 7
BIT 7
BIT 7
2
2
2
7
7
7
SFP Controller with Dual LDD Interface
2
2
2
6
6
6
LTXP1
HTXP1
HBIAS1
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
(PW2 and QT1EN = 0) or (PW1 and RWTBL2 and QT1EN = 0)
Common A2h and B2h memory location
Volatile
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
(PW2 and QT1EN = 0) or (PW1 and RWTBL2 and QT1EN = 0)
Common A2h and B2h memory location
Volatile
00h
PW2 or (PW1 and RWTBL2) or (PW1 and RTBL2)
(PW2 and QT1EN = 0) or (PW1 and RWTBL2 and QT1EN = 0)
Common A2h and B2h memory location
Volatile
compared against V
compared against V
2
2
2
compared against V
5
5
5
V
V
HBIAS1
V
HTXP1
LTXP1
=
=
=
2
2
2
Full Scale
4
4
Full Scale
4
Full Scale
PMON1
PMON1
256
256
256
BMON1
create a TXP LO alarm.
create a TXP HI alarm.
×
×
×
HBIAS1 DAC
HTXP1 DAC
LTXP1 DAC
create an HBAL alarm.
2
2
2
3
3
3
2
2
2
2
2
2
2
2
2
1
1
1
BIT 0
BIT 0
BIT 0
2
2
2
0
0
0
57

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